Neuromorphic systems are the future computing systems to overcome the von Neumann’s power consumption and latency wall between memory and processing units. The two main components of any neuromorphic computing system are neurons and synapses. Synapses carry the weight of the system to be multiplied by the neuromorphic attributes, which represent the features of the task to be solved. Memristor (memoryresistor) is the most suitable circuit element to act as a synapse. Its ability to store, update and do matrix multiplication in nanoscale die area makes it very useful in neuromorphic synapses. One of the most popular memristor synapse configurations is the two-transistor–one-memristor (2T1M) synapse. This configuration is very useful in neuromorphic synapses for its ability to control reading and updating the weight on a chip by signals. The main problem with this synapse is that the reading operation is destructive, which results in changing the stored weight value. In this paper, a novel refreshment circuit is proposed to restore the correct weight in case of any destructive reading operations. The circuit makes a small interrupt time during operation without disconnecting the memristor, which makes the circuit very practical. The circuit has been simulated by using hardware-calibrated CMOS TSMC 130nm technology on Cadence Virtuoso and linear ion drift memristor Verilog-A model. The proposed circuit achieves the refreshment task accurately for several error types. It is used to refresh 2T1M synapse with any destructive reading signal shape.

中文翻译：

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一种用于 2T1M 神经形态突触的新型刷新电路

神经形态系统是未来的计算系统，可以克服冯诺依曼的功耗和内存和处理单元之间的延迟墙。任何神经形态计算系统的两个主要组成部分是神经元和突触。突触承载了要乘以神经形态属性的系统权重，这些属性代表了要解决的任务的特征。忆阻器（memoryresistor）是最适合充当突触的电路元件。它在纳米级芯片区域中存储、更新和进行矩阵乘法的能力使其在神经形态突触中非常有用。最流行的忆阻器突触配置之一是双晶体管一忆阻器 (2T1M) 突触。这种配置在神经形态突触中非常有用，因为它能够通过信号控制读取和更新芯片上的权重。这个突触的主要问题是读取操作是破坏性的，这会导致存储的权重值发生变化。在本文中，提出了一种新的刷新电路，以在任何破坏性读取操作的情况下恢复正确的权重。该电路在不断开忆阻器的情况下，在工作过程中产生了很小的中断时间，这使得该电路非常实用。该电路已使用硬件校准的 CMOS TSMC 130 进行了仿真Cadence Virtuoso 和线性离子漂移忆阻器 Verilog-A 模型上的纳米技术。所提出的电路针对几种错误类型准确地实现了刷新任务。它用于刷新具有任何破坏性读取信号形状的 2T1M 突触。