FinFET provide themselves as a strong candidate for low-power applications. However, the enactment of a device depends upon the precision of fabrication process. The ion implantation technique of source/drain region extends towards the channel region and affects the device performance. In this paper, the DC and short channel performances like transfer characteristic, output characteristic, Subthreshold Swing (SS), threshold voltage (V_T), and current ratio (I_on/I_off) of SOI FinFET are reported for the variation in lateral straggle parameter (σ) from 0 to 5 nm. The effect of lateral straggle on various RF/analog figure of merits (FOMs) like transconductance (g_m), output conductance (g_d), intrinsic gain (g_m/g_d), gate capacitance (C_gg), cut off frequency (f_c), and gain frequency product (GFP) are presented for SOI FinFET. Furthermore, the linearity performance such as higher-order harmonics (g_m2, g_m3), voltage intercept point (VIP2, VIP3), input intercept point (IIP₃), intermodulation distortion (IMD₃), and 1-dB compression point are investigated by varying the lateral straggle from 0 to 5 nm. Results reveal that ION = 0.526 mA, g_m = 0.507 mS, and f_c = 3 THz are obtained at σ = 5 nm, whereas, VIP2 = 27.5 V and VIP3 = 20.2 V are observed at σ = 0 nm.

FinFET 是低功耗应用的有力候选者。然而，装置的制定取决于制造工艺的精度。源漏区的离子注入技术向沟道区延伸，影响器件性能。本文报告了 SOI FinFET 的直流和短沟道性能，如传输特性、输出特性、亚阈值摆幅 (SS)、阈值电压 ( V _T ) 和电流比 ( I _on / I _off ) 的横向变化散乱参数 ( σ ) 从 0 到 5 nm。横向散乱对各种射频/模拟品质因数 (FOM) 的影响，例如跨导 ( g _m)、输出电导 ( g _d )、本征增益 ( g _m / g _d )、栅极电容 ( C _gg )、截止频率 ( f _c ) 和增益频率积 (GFP) 针对 SOI FinFET。此外，高次谐波 ( g _m2、g _m3 )、电压截点 (VIP2、 VIP3)、输入截点 (IIP ₃ )、互调失真 (IMD ₃ ) 和 1-dB 压缩点等线性性能为通过改变横向散乱从 0 到 5 nm 进行研究。结果表明 ION = 0.526 mA, g _m在σ = 5 nm 处获得= 0.507 mS 和f _{c = 3 THz，而在}σ = 0 nm处观察到 VIP2 = 27.5 V 和 VIP3 = 20.2 V。