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A Fast-and-Effective Early-Stage Multi-level Cache Optimization Method Based on Reuse-Distance Analysis
arXiv - CS - Hardware Architecture Pub Date : 2021-09-10 , DOI: arxiv-2109.04614
Cheng-Lin Tsai, Ren-Song Tsay

In this paper, we propose a practical and effective approach allowing designers to optimize multi-level cache size at the early system design phase. Our key contribution is to generalize the reuse distance analysis method and develop an effective and practical cache design optimization approach. We adopt a simple scanning search method to locate optimal cache solutions in terms of cache size, power consumption, or average data access delay. The proposed approach is particularly useful for early-phase system designers and is verified to be 150 to 250 times faster than the traditional simulation-based approach. In addition, we also introduce a simplified analytical model and provide designers insights about how cache design parameters may affect the expected results. As a result, designers can make an adequate decision in the early system design phase.

中文翻译:

一种快速有效的基于复用距离分析的早期多级缓存优化方法

在本文中,我们提出了一种实用且有效的方法,允许设计人员在早期系统设计阶段优化多级缓存大小。我们的主要贡献是推广重用距离分析方法并开发有效且实用的缓存设计优化方法。我们采用简单的扫描搜索方法,从缓存大小、功耗或平均数据访问延迟方面定位最佳缓存解决方案。所提出的方法对早期系统设计人员特别有用,并且经验证比传统的基于仿真的方法快 150 到 250 倍。此外,我们还引入了一个简化的分析模型,并为设计人员提供了有关缓存设计参数如何影响预期结果的见解。其结果,
更新日期:2021-09-13
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