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Simplified logical modulator for the reduction of common mode voltage in alternating current drives
Journal of Power Electronics ( IF 1.3 ) Pub Date : 2021-09-10 , DOI: 10.1007/s43236-021-00303-y
Murugesan Kullan 1 , Senthil Kumaran Mahadevan 1 , Anitha Roseline Johnson 1
Affiliation  

This paper proposes the reduction of common mode voltage (CMV) magnitude using a simplified logical modulator (SLM). This modulator uses the ideas of space vectors to detect and eliminate the high common mode vectors produced by carrier phase-shifted sine pulse width modulation generator. The proposed SLM has an inherent ability to eliminate the CMV spikes due to dead time, but it introduces short circuit vectors (SCVs). This issue is addressed by designing an SCV eliminator (SCVE). The performance of the SLM-SCVE is validated through simulations. The proposed SLM-SCVE is implemented using MATLAB—Xilinx system generator interface in Spartan 3E–FPGA and tested in a prototype hardware. The proposed SLM-SCVE proves to be a simple and reliable solution for the reduction of CMV in industrial application because finite number of logic gates is used.



中文翻译:

用于降低交流驱动共模电压的简化逻辑调制器

本文建议使用简化的逻辑调制器 (SLM) 降低共模电压 (CMV) 幅度。该调制器利用空间矢量的思想来检测和消除载波相移正弦脉宽调制发生器产生的高共模矢量。所提出的 SLM 具有消除由于死区时间引起的 CMV 尖峰的固有能力,但它引入了短路矢量 (SCV)。此问题已通过设计 SCV 消除器 (SCVE) 得到解决。SLM-SCVE 的性能通过模拟得到验证。建议的 SLM-SCVE 是使用 MATLAB-Xilinx 系统生成器接口在 Spartan 3E-FPGA 中实现的,并在原型硬件中进行测试。由于使用了有限数量的逻辑门,因此所提出的 SLM-SCVE 被证明是一种用于减少工业应用中 CMV 的简单可靠的解决方案。

更新日期:2021-09-10
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