The increasing complexity of Internet-of-Things (IoT) applications and near-sensor processing algorithms is pushing the computational power of low-power, battery-operated end-node systems. This trend also reveals growing demands for high-speed and energy-efficient inter-chip communications to manage the increasing amount of data coming from off-chip sensors and memories. While traditional micro-controller interfaces such as SPIs cannot cope with tight energy and large bandwidth requirements, low-voltage swing transceivers can tackle this challenge thanks to their capability to achieve several Gbps of the communication speed at milliwatt power levels. However, recent research on high-speed serial links focused on high-performance systems, with a power consumption significantly larger than the one of low-power IoT end-nodes, or on stand-alone designs not integrated at a system level. This paper presents a low-swing transceiver for the energy-efficient and low power chip-to-chip communication fully integrated within an IoT end-node System-on-Chip, fabricated in CMOS 65nm technology. The transceiver can be easily controlled via a software interface; thus, we can consider realistic scenarios for the data communication, which cannot be assessed in stand-alone prototypes. Chip measurements show that the transceiver achieves 8.46x higher energy efficiency at 15.9x higher performance than a traditional microcontroller interface such as a single-SPI.

中文翻译：

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用于 65 纳米 CMOS 中超低功耗物联网终端节点的全集成 5mW、0.8Gbps 高能效芯片到芯片数据链路

物联网 (IoT) 应用程序和近传感器处理算法日益复杂，正在推动低功耗、电池供电的终端节点系统的计算能力。这一趋势还揭示了对高速和节能的芯片间通信的需求不断增长，以管理来自芯片外传感器和存储器的越来越多的数据。虽然传统的微控制器接口（如 SPI）无法应对严格的能量和大带宽要求，但低电压摆幅收发器可以应对这一挑战，因为它们能够在毫瓦功率级别实现数 Gbps 的通信速度。然而，最近对高速串行链路的研究集中在高性能系统上，其功耗明显大于低功耗物联网终端节点之一，或未在系统级别集成的独立设计。本文介绍了一种低摆幅收发器，用于完全集成在物联网终端节点片上系统中的高能效和低功耗芯片到芯片通信，采用 CMOS 65nm 技术制造。收发器可通过软件界面轻松控制；因此，我们可以考虑数据通信的现实场景，而这些场景无法在独立原型中进行评估。芯片测量表明，与单 SPI 等传统微控制器接口相比，收发器的能效提高了 8.46 倍，性能提高了 15.9 倍。采用 CMOS 65nm 技术制造。收发器可通过软件界面轻松控制；因此，我们可以考虑数据通信的现实场景，而这些场景无法在独立原型中进行评估。芯片测量表明，与单 SPI 等传统微控制器接口相比，收发器的能效提高了 8.46 倍，性能提高了 15.9 倍。采用 CMOS 65nm 技术制造。收发器可通过软件界面轻松控制；因此，我们可以考虑数据通信的现实场景，而这些场景无法在独立原型中进行评估。芯片测量表明，与单 SPI 等传统微控制器接口相比，收发器的能效提高了 8.46 倍，性能提高了 15.9 倍。