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Layout-Dominated Dynamic Imbalanced Current Analysis and Its Suppression Strategy of Parallel SiC MOSFETs
IEEE Transactions on Device and Materials Reliability ( IF 2.5 ) Pub Date : 2021-08-02 , DOI: 10.1109/tdmr.2021.3101719
Bin Zhao , Peng Sun , Qiuping Yu , Yumeng Cai , Zhibin Zhao

The multichip power module is a popular application for large-capacity and high-frequency converters. However, the existence of an asymmetric circuit layout has a significant influence on the current sharing among parallel SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). In this paper, the mechanism of the dynamic current imbalance resulting from the asymmetry of signal terminal confluence points (STCPs) is comprehensively investigated by theoretical analyses and simulation validations. It is demonstrated that the infinite norm of the common branch impedance coupling matrix (INC) can be used to characterize the dynamic current sharing performance. With an increase in the infinite norm, the dynamic current imbalance of parallel SiC MOSFETs gradually increases. Moreover, some significant discoveries are obtained. It is concluded that dynamic current imbalance is dominated by the asymmetry of the power source confluence point (PSCP). However, the asymmetry of the drain, gate, and auxiliary source confluence points does not exhibit a great effect on dynamic current sharing. Then, a novel circuit layout with an elliptical structure is proposed to suppress the dynamic current imbalance. Finally, some experimental tests are derived to validate the effectiveness of the designed layout. Compared with the commercial power module, experimental results show that the maximum dynamic imbalanced current with the proposed layout is reduced from 7.39 A to 1.37 A, and the largest dynamic current imbalanced deviation decreases from 28.66% to 5.11%.

中文翻译:


并联SiC MOSFET布局主导的动态不平衡电流分析及其抑制策略



多芯片电源模块是大容量、高频转换器的流行应用。然而,不对称电路布局的存在对并联 SiC 金属氧化物半导体场效应晶体管 (MOSFET) 之间的电流共享具有重大影响。本文通过理论分析和仿真验证,全面研究了信号终端汇合点(STCP)不对称导致的动态电流不平衡的机理。证明了公共支路阻抗耦合矩阵(INC)的无限范数可以用来表征动态均流性能。随着无限范数的增加,并联SiC MOSFET的动态电流不平衡逐渐增加。此外,还获得了一些重大发现。结论是,动态电流不平衡主要是由电源汇流点(PSCP)的不对称性决定的。然而,漏极、栅极和辅助源极汇合点的不对称性对于动态均流并没有表现出很大的影响。然后,提出了一种新颖的椭圆结构电路布局来抑制动态电流不平衡。最后,进行了一些实验测试来验证设计布局的有效性。实验结果表明,与商用功率模块相比,该布局的最大动态不平衡电流从7.39 A减小到1.37 A,最大动态电流不平衡偏差从28.66%减小到5.11%。
更新日期:2021-08-02
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