Repeated off-chip memory accesses to DRAM drive up operating power for data-intensive applications, and SRAM technology scaling and leakage power limits the efficiency of embedded memories. Future on-chip storage will need higher density and energy efficiency, and the actively expanding field of emerging, embeddable non-volatile memory (eNVM) technologies is providing many potential candidates to satisfy this need. Each technology proposal presents distinct trade-offs in terms of density, read, write, and reliability characteristics, and we present a comprehensive framework for navigating and quantifying these design trade-offs alongside realistic system constraints and application-level impacts. This work evaluates eNVM-based storage for a range of application and system contexts including machine learning on the edge, graph analytics, and general purpose cache hierarchy, in addition to describing a freely available (http://nvmexplorer.seas.harvard.edu/) set of tools for application experts, system designers, and device experts to better understand, compare, and quantify the next generation of embedded memory solutions.

中文翻译：

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NVMExplorer：嵌入式非易失性存储器的跨堆栈比较框架

对 DRAM 的重复片外存储器访问会提高数据密集型应用的运行功率，而 SRAM 技术缩放和泄漏功率限制了嵌入式存储器的效率。未来的片上存储将需要更高的密度和能效，而新兴的嵌入式非易失性存储器 (eNVM) 技术领域的积极扩展正在为满足这一需求提供许多潜在的候选者。每个技术提案在密度、读取、写入和可靠性特性方面都有不同的权衡，我们提出了一个综合框架，用于导航和量化这些设计权衡以及现实的系统约束和应用程序级影响。这项工作针对一系列应用程序和系统环境评估基于 eNVM 的存储，包括边缘机器学习、图形分析、