With the rapid development of scientific computation, more and more researchers and developers are committed to implementing various workloads/operations on different devices. Among all these devices, NVIDIA GPU is the most popular choice due to its comprehensive documentation and excellent development tools. As a result, there are abundant resources for hand-writing high-performance CUDA codes. However, CUDA is mainly supported by only commercial products and there has been no support for open-source H/W platforms. RISC-V is the most popular choice for hardware ISA, thanks to its elegant design and open-source license. In this project, we aim to utilize these existing CUDA codes with RISC-V devices. More specifically, we design and implement a pipeline that can execute CUDA source code on an RISC-V GPU architecture. We have succeeded in executing CUDA kernels with several important features, like multi-thread and atomic instructions, on an RISC-V GPU architecture.

中文翻译：

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支持用于扩展 RISC-V GPU 架构的 CUDA

随着科学计算的快速发展，越来越多的研究人员和开发人员致力于在不同设备上实现各种工作负载/操作。在所有这些设备中，NVIDIA GPU 因其全面的文档和出色的开发工具而成为最受欢迎的选择。因此，手写高性能 CUDA 代码有丰富的资源。但是，CUDA 主要仅由商业产品支持，并没有对开源硬件平台的支持。由于其优雅的设计和开源许可，RISC-V 是硬件 ISA 最受欢迎的选择。在这个项目中，我们的目标是将这些现有的 CUDA 代码用于 RISC-V 设备。更具体地说，我们设计并实现了一个可以在 RISC-V GPU 架构上执行 CUDA 源代码的管道。