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Thermal-Aware Floorplanning and TSV-Planning for Mixed-Type Modules in a Fixed-Outline 3-D IC
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2021-08-05 , DOI: 10.1109/tvlsi.2021.3100343
Jai-Ming Lin , Wei-Yi Chang , Hao-Yuan Hsieh , Ya-Ting Shyu , Yeong-Jar Chang , Juin-Ming Lu

High temperature or temperature nonuniformity has become a serious threat to performance and reliability of high-performance integrated circuits (ICs). Since the temperature in a 3-D IC is mainly determined by a power distribution across tiers, this article proposes a novel method to allocate modules to tiers while exploring a better power distribution according to the hyperparameter optimization technique. In addition, we integrate the sub-3-D thermal mask into the analytical formulation to interleave high power consumption modules in contiguous tiers during distributing modules over placement regions so that it is possible to insert through-silicon vias (TSVs) around high power modules to further reduce the temperature at a later stage. Since the temperature in a tier will be changed every time the locations of TSVs in its lower tier are moved, we also propose a procedure to update the temperature map before refining locations of TSVs. Experimental results have demonstrated that the proposed methodology can effectively reduce the temperature of a 3-D IC with a slight increase in the wirelength. Moreover, its runtime is quite fast.

中文翻译:


固定外形 3D IC 中混合型模块的热感知布局规划和 TSV 规划



高温或温度不均匀性已成为高性能集成电路(IC)性能和可靠性的严重威胁。由于 3D IC 中的温度主要由跨层的功率分布决定,因此本文提出了一种将模块分配到层的新颖方法,同时根据超参数优化技术探索更好的功率分布。此外,我们将亚 3D 热掩模集成到分析公式中,以便在将模块分布在布局区域上时将高功耗模块交错在连续层中,从而可以在高功率模块周围插入硅通孔 (TSV)以便后期进一步降低温度。由于每次移动下层中 TSV 的位置时,层中的温度都会发生变化,因此我们还提出了一种在细化 TSV 位置之前更新温度图的程序。实验结果表明,所提出的方法可以通过稍微增加线长来有效降低3D IC的温度。而且,它的运行时间相当快。
更新日期:2021-08-05
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