ABSTRACT

The transistor-based CMOS technology is facing tremendous physical challenges in nano-scale design. The Quantum-dot cellular automata (QCA) have attracted the research focus as aviable alternative to CMOS technology for future designs in the nano-scale. The cell interaction property helps in information propagation in QCA. The three-input majority gate, Inverter gate are the basic building blocks. The fabrication complexity can be optimised with coplanar and clock-based wire crossing techniques. Due to its low power feature, QCA has been experiencing significant power dissipation in its wire crossing and logic-driving cell, which needs special care. Moreover, various challenges to logic synthesis are associated with design automation and integration. Underlying metal wire crossing is another concern in the implementation of a regular clocking circuit. Extensive design proposals in QCA have been studied bypassing regular clocking and ends up with a question of proper fabrication or buildability. This research proposes an emerging technique to develop an efficient, scalable regular clocking scheme incorporating minimal metal wire crossing. The proposed clocking is employed for the cost-effective and power-efficient circuit design in both the sequential and the combinational approach. QCADesigner is used for circuit synthesis, whereas QCAPro and QCADesignerE have been utilised for energy dissipation analysis.

摘要

基于晶体管的 CMOS 技术在纳米级设计中面临着巨大的物理挑战。量子点元胞自动机 (QCA) 作为未来纳米级设计的 CMOS 技术的可行替代方案，已成为研究焦点。细胞相互作用属性有助于 QCA 中的信息传播。三输入多数门、逆变器门是基本构建块。可以使用共面和基于时钟的导线交叉技术优化制造复杂性。由于其低功耗特性，QCA 在其导线交叉和逻辑驱动单元中一直存在显着的功耗，需要特别小心。此外，逻辑综合的各种挑战与设计自动化和集成相关。底层金属线交叉是实现常规时钟电路的另一个问题。QCA 中的大量设计建议已经绕过常规时钟进行了研究，最终导致了正确制造或可构建性的问题。这项研究提出了一种新兴技术，用于开发一种有效的、可扩展的常规时钟方案，其中包含最小的金属线交叉。所提出的时钟用于顺序和组合方法中的成本效益和功率效率电路设计。QCADesigner 用于电路综合，而 QCAPro 和 QCADesignerE 已用于能量耗散分析。这项研究提出了一种新兴技术，用于开发一种有效的、可扩展的常规时钟方案，其中包含最小的金属线交叉。所提出的时钟用于顺序和组合方法中的成本效益和功率效率电路设计。QCADesigner 用于电路综合，而 QCAPro 和 QCADesignerE 已用于能量耗散分析。这项研究提出了一种新兴技术，用于开发一种有效的、可扩展的常规时钟方案，其中包含最小的金属线交叉。所提出的时钟用于顺序和组合方法中的成本效益和功率效率电路设计。QCADesigner 用于电路综合，而 QCAPro 和 QCADesignerE 已用于能量耗散分析。