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Theoretical Analysis of On-Chip Vertical Hybrid Plasmonic Nanograting
Plasmonics ( IF 3.3 ) Pub Date : 2021-08-16 , DOI: 10.1007/s11468-021-01517-3
Samyuktha K. Reddy 1 , Santosh Kumar Sahu 1 , Rohit Khoja 1 , Sumit Kanu 1 , Mandeep Singh 1
Affiliation  

A complementary metal oxide semiconductor (CMOS) compatible photonic-plasmonic waveguide with nanoscale dimensions and better optical confinement has been proposed for the infrared (IR)–band applications. The design is based on the multi-layer hybrid plasmonic waveguide (Si–SiO2–Au) structure. The 3D-finite element method (FEM)–based numerical simulations of single slot hybrid plasmonic waveguide (HPWG) confirms 2.5 dB/cm propagation loss and 15 μm−2 confined intensity. Moreover, its application as dual-slot nanograting is studied with higher propagation length and ultra–low–dispersion near the 1550–nm wavelength. The proposed low-dispersion nanoscale grating design is suitable for future lab–on–chip nanophotonic integrated circuits.



中文翻译:

片上垂直混合等离子体纳米光栅的理论分析

具有纳米级尺寸和更好光学限制的互补金属氧化物半导体 (CMOS) 兼容光子等离子体波导已被提出用于红外 (IR) 波段应用。该设计基于多层混合等离子体波导(Si-SiO 2 -Au)结构。基于 3D 有限元方法 (FEM) 的单槽混合等离子体波导 (HPWG) 数值模拟证实了 2.5 dB/cm 传播损耗和 15 μm -2受限强度。此外,研究了它作为双槽纳米光栅的应用,在 1550 nm 波长附近具有更高的传播长度和超低色散。所提出的低色散纳米级光栅设计适用于未来的芯片实验室纳米光子集成电路。

更新日期:2021-08-19
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