Current mirrors (CMs) are essential building blocks for biasing integrated circuits. The gate-all-around silicon nanosheet MOSFETs (GAA-NS) are excellent candidates for the sub 7 nm technology node. In this work, CMs designed with GAA-NS are studied for the first time. This study is performed from room temperature to 200 C using Verilog-A with Look Up Table based on experimental data of n- and p-type GAA-NS for circuit simulation. The current source (reference current) that supplies the CM is designed with an inverter with feedback for simplicity. Due to the zero temperature coefficient (ZTC) region, multiple designs are made to evaluate each type of biasing (before, after and in the ZTC region). Symmetric and asymmetric V_TH for n- and p-type GAA-NS are also analyzed. The asymmetric approach presents a compliance voltage of 0.7 V and 0.8 V, for an n- and p-mirror, respectively, while the symmetric one yields a compliance voltage of 0.75 V for both mirror types, and errors lower than 6%, for the design biasing the transistors before the ZTC region.

电流镜 (CM) 是偏置集成电路的基本构建块。全栅极硅纳米片 MOSFET (GAA-NS) 是亚 7 nm 技术节点的绝佳候选者。在这项工作中，首次研究了用 GAA-NS 设计的 CM。本研究使用 Verilog-A 和查找表从室温到 200 C 进行，基于用于电路模拟的 n 型和 p 型 GAA-NS 的实验数据。为简单起见，为 CM 供电的电流源（参考电流）设计有带反馈的逆变器。由于零温度系数 (ZTC) 区域，需要进行多种设计来评估每种类型的偏置（在 ZTC 区域之前、之后和之中）。对称和非对称 V _TH还分析了 n 型和 p 型 GAA-NS。对于 n 型和 p 型反射镜，非对称方法分别提供 0.7 V 和 0.8 V 的顺从电压，而对称方法对两种反射镜类型产生 0.75 V 的顺从电压，误差低于 6%，对于在 ZTC 区域之前设计偏置晶体管。