This letter presents a K-band compact Wilkinson power divider/combiner (WPDC) with 50-dB configurable isolation in 65-nm CMOS. The WPDC is implemented by LC-based spiral transmission lines (LCSTLs), switched capacitors, and a DAC with a core area of 0.09 mm 2 . The measured insertion loss was 2.5 dB with 0.2 dB fluctuation in the passband. The measured amplitude and phase error are within 0.2 dB and 0.7° from dc to 50 GHz, respectively. The proposed WPDC supports four operation modes, in which the isolation of more than 35 dB from 20.2 to 27 GHz can be maintained with a peak isolation of 60 dB (@ 22.4 GHz). To the best of our knowledge, the WPDC is the only millimeter-wave power divider/combiner (PD/C) that can achieve an isolation of more than 35 dB within a 29% relative bandwidth in CMOS process.

中文翻译：

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采用 65 nm CMOS 封装、具有 50 dB 可配置隔离度的 K 波段紧凑型功率分配器/合成器


这封信介绍了一款采用 65 nm CMOS 封装、具有 50 dB 可配置隔离度的 K 波段紧凑型 Wilkinson 功率分配器/合成器 (WPDC)。 WPDC由基于LC的螺旋传输线(LCSTL)、开关电容器和核心面积为0.09 mm 2 的DAC实现。测得的插入损耗为 2.5 dB，通带波动为 0.2 dB。从直流到 50 GHz，测得的幅度和相位误差分别在 0.2 dB 和 0.7° 以内。所提出的 WPDC 支持四种操作模式，其中从 20.2 至 27 GHz 的隔离度可保持超过 35 dB，峰值隔离度为 60 dB (@ 22.4 GHz)。据我们所知，WPDC 是唯一一款能够在 CMOS 工艺中在 29% 相对带宽内实现超过 35 dB 隔离度的毫米波功率分配器/合成器 (PD/C)。