To simultaneously evaluate the switching performance and cost (required chip size) of GaN vertical-trench metal-oxide-semiconductor field-effect transistors, we calculated R _on AR _on Q _g considering the Miller effect with various cell pitches, channel mobilities, and blocking voltages. When the blocking voltage was 600V, optimized cell pitches of 8 and 12μm minimized R _on AR _on Q _g with channel mobilities of 100 and 200 cm²V⁻¹s⁻¹, respectively. Moreover, a wide range of cell pitches could maintain a low R _on AR _on Q _g with a channel mobility of 200 cm²V⁻¹s⁻¹. This indicates that a channel mobility of 100 cm²V⁻¹s⁻¹ or higher, particularly 200 cm²V⁻¹s⁻¹, is desirable for a good switching performance and low cost.

为了同时评估 GaN 垂直沟槽金属氧化物半导体场效应晶体管的开关性能和成本（所需的芯片尺寸），我们考虑了具有各种单元间距、通道迁移率和阻塞的米勒效应，计算_了Q _g上AR_上的R 电压。当阻断电压为 600V 时，8 和 12 μm 的优化单元间距使Q _g上AR_上的R最小化，通道迁移率分别为 100 和 200 cm ² V ^-1 s ^-1。此外，大范围的单元间距可以_在AR_上保持较低的R Q _g具有200 cm ² V ^-1 s ^-1的沟道迁移率。这表明100cm ² V ^-1 s ^-1或更高，特别是200cm ² V ^-1 s ^-1的沟道迁移率对于良好的开关性能和低成本是合乎需要的。