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The Effect of Si Surface Flattening Process on the MISFET With High-k HfNx Multilayer Gate Dielectrics
IEEE Transactions on Semiconductor Manufacturing ( IF 2.3 ) Pub Date : 2021-03-24 , DOI: 10.1109/tsm.2021.3068475
Akio Ihara , Hiroki Morita , Jooyoung Pyo , Shun-Ichiro Ohmi

Metal-insulator-semiconductor field-effect transistors (MISFETs) with high-k HfNx multilayer gate dielectrics fabricated with Si surface flattening process were investigated. The Si surface flattening process was carried out by Ar/1.0%H2 annealing for 30 min. A higher I on/ I off current ratio was obtained by increasing the number of HfNx gate dielectric layers while its characteristics such as drain current, saturation mobility and subthreshold swing (SS) are not markedly degraded. This is attributed to the thicker gate dielectrics. Furthermore, it is found that these characteristics are found to be effectively improved by Si surface flattening process.

中文翻译:


Si 表面平坦化工艺对采用高 k HfNx 多层栅极电介质的 MISFET 的影响



研究了采用 Si 表面平坦化工艺制造的具有高 k HfNx 多层栅极电介质的金属-绝缘体-半导体场效应晶体管 (MISFET)。 Si表面平整工艺采用Ar/1.0%H2退火30 min。通过增加HfNx栅极介电层的数量获得了更高的Ion/Ioff电流比,同时其漏极电流、饱和迁移率和亚阈值摆幅(SS)等特性没有明显下降。这是由于栅极电介质较厚。此外,发现这些特性通过Si表面平坦化工艺得到有效改善。
更新日期:2021-03-24
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