Purpose

The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA).

Design/methodology/approach

The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of C_gs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability.

Findings

With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation.

Practical implications

The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design.

Originality/value

The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

中文翻译：

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完全匹配的双级 CMOS 功率放大器，集成无源线性化器，增益为 23 db，PAE 为 40% 和 28 DBM OIP3

目的

本文的目的是介绍一种新的线性化技术，称为无源线性化技术，该技术不影响功率附加效率 (PAE)，同时为互补金属氧化物半导体 (CMOS) 功率放大器保持超过 20 dB 的功率增益。 PA）。

设计/方法/方法

线性化机制是在主放大器的栅极处实施的无源线性化器的帮助下执行的，以通过在主放大器处产生相反的相位响应来最小化 C _gs电容的影响。无电感输出匹配网络呈现出几乎无损的输出匹配网络，有助于实现高增益、PAE 和输出功率。线性性能得到改善，而不会降低功耗、功率增益和稳定性。

发现

使用这种拓扑结构，PA 为 2.4 GHz 至 2.5 GHz 的蓝牙低功耗 (BLE) 频段提供超过 20 dB 的增益，电源裕量为 1.8 V。在 2.45 GHz 的中心频率下，PA 的增益为 23.3 dB，最大输出功率为 14.3 dBm 时对应的峰值 PAE 为 40.11%。在 12.7 dBm 的最大线性输出功率下，PAE 为 37.3%，峰值三阶互调产物为 28.04 dBm，功耗为 50.58 mW。这对应于 – 20 dBc 的 ACLR，从而使 PA 有资格进行 BLE 操作。

实际影响

所提出的技术能够提高效率和输出功率，并使 PA 线性化更接近 1 dB 压缩点。这减少了 CMOS PA 设计中线性输出功率和 PAE 之间的权衡。

原创性/价值

建议的 CMOS PA 可以轻松集成到 BLE 发射器，从而降低收发器的整体功耗。