In this technical report, we present HW2VEC [11], an open-source graph learning tool for hardware security, and its implementation details (Figure 1). HW2VEC provides toolboxes for graph representation extraction in the form of Data Flow Graphs (DFGs) or Abstract Syntax Trees (ASTs) from hardware designs at RTL and GLN levels. Besides, HW2VEC also offers graph learning tools for representing hardware designs in vectors that preserve both structural features and behavioral features. To the best of our knowledge, HW2VEC is the first open-source research tool that supports applying graph learning methods to hardware designs in different abstraction levels for hardware security. We organize the remainder of this technical report as follows: Section 2 introduces the architecture of HW2VEC; Section 3 gives information about the use-case implementations; Section 4 provides the experimental results and demonstrates the performance of HW2VEC for two hardware security applications: HT detection and IP piracy detection; finally, Section 5 will conclude this report.

中文翻译：

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HW2VEC 技术报告——用于自动化硬件安全的图学习工具

在这份技术报告中，我们介绍了 HW2VEC [11]，一种用于硬件安全的开源图学习工具，及其实现细节（图 1）。HW2VEC 提供了工具箱，用于从 RTL 和 GLN 级别的硬件设计中以数据流图 (DFG) 或抽象语法树 (AST) 的形式提取图形表示。此外，HW2VEC 还提供图形学习工具，用于在保留结构特征和行为特征的向量中表示硬件设计。据我们所知，HW2VEC 是第一个支持将图学习方法应用于不同抽象级别的硬件设计以实现硬件安全的开源研究工具。我们将本技术报告的其余部分组织如下：第 2 节介绍了 HW2VEC 的架构；第 3 节给出了有关用例实现的信息；第 4 节提供了实验结果并演示了 HW2VEC 在两个硬件安全应用中的性能：HT 检测和 IP 盗版检测；最后，第 5 节将总结本报告。