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An Energy-Efficient Conditional Biasing Write Assist With Built-In Time-Based Write-Margin-Tracking for Low-Voltage SRAM
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2021-06-09 , DOI: 10.1109/tvlsi.2021.3084041
Chi-Ray Huang , Lih-Yih Chiou

Write assists (WAs), such as negative bitline and collapse supply voltage (VDD), can effectively improve the write Vmin of static random access memory (SRAM) cells. The energy overhead associated with such assists is considerable due to the switching activities on high capacitive nodes for every write operation. In this brief, a conditional biasing WA with built-in time-based write-margin-tracking is proposed to avoid unnecessary assist for energy saving. The biasing voltage for assisting the write procedure is only adjusted during write failures and remains unchanged for native write-success cells. Compared with conventional WAs, the proposed design can reduce write energy by 29%-34% with a similar area overhead. In addition, silicon measurements have demonstrated that the proposed assist is functional for near-threshold operations and VDDmin is reduced to 0.4 V.

中文翻译:


适用于低电压 SRAM 的节能条件偏置写入辅助,具有内置基于时间的写入裕度跟踪



写辅助(WA),例如负位线和崩溃电源电压(VDD),可以有效提高静态随机存取存储器(SRAM)单元的写入Vmin。由于每次写入操作的高电容节点上的切换活动,与此类辅助相关的能量开销相当大。在本简报中,提出了一种具有内置基于时间的写入余量跟踪的条件偏置 WA,以避免不必要的节能帮助。仅在写入失败期间调整用于辅助写入过程的偏置电压,并且对于本机写入成功单元保持不变。与传统的WA相比,所提出的设计可以在相似的面积开销下降低写入能量29%-34%。此外,硅测量表明,所提出的辅助功能可用于近阈值操作,并且 VDDmin 降至 0.4V。
更新日期:2021-06-09
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