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A Detailed Model of the Switched-Resistor Technique
IEEE Open Journal of Circuits and Systems Pub Date : 2021-07-27 , DOI: 10.1109/ojcas.2021.3098055
Francesco Centurelli , Alessandro Fava , Giuseppe Scotti , Alessandro Trifiletti

The Switched-Resistor (S-R) approach is gaining popularity among integrated circuits designers because it allows to implement very high equivalent resistances, and thus very large time constants, in CMOS circuits. In this paper, we present an in-depth analysis of the S-R technique and propose a novel detailed model which allows to accurately predict the value of the equivalent resistance even for values of the duty cycle as low as 0.0001% which result in a huge resistance multiplication factor. We show that the conventional model of the S-R technique provides a reasonable accuracy for duty cycle values down to 1%, but its accuracy becomes unacceptable for smaller values of the duty cycle. In the proposed detailed model of the S-R we take into account also the parasitic capacitances of the integrated poly resistors and the non-ideal resistance of the CMOS switches. The modeling strategy is based on the solution of the differential equations for the different switches settings and exploits the Y-matrix to represents the floating S-R. The proposed model has been validated against periodic steady state (PSS) and periodic AC (PAC) simulations referring to a 130nm CMOS technology. Results have shown an average and maximum error lower than 0.53% and 5.15% respectively. As a further validation, a first-order active low-pass filter has been implemented with the same technology with a cutoff frequency tunable from 1.68Hz to 1.46kHz. The average and maximum errors in the estimation of the cutoff frequency have resulted lower than 3.6% and 7% respectively.

中文翻译:

开关电阻技术的详细模型

开关电阻器 (SR) 方法在集成电路设计人员中越来越受欢迎,因为它允许在 CMOS 电路中实现非常高的等效电阻,从而实现非常大的时间常数。在本文中,我们对 SR 技术进行了深入分析,并提出了一种新颖的详细模型,即使占空比低至 0.0001% 的值也会导致巨大的电阻,该模型也可以准确预测等效电阻的值倍增因子。我们表明,SR 技术的传统模型为低至 1% 的占空比值提供了合理的精度,但对于较小的占空比值,其精度变得不可接受。在建议的 SR 详细模型中,我们还考虑了集成多晶硅电阻器的寄生电容和 CMOS 开关的非理想电阻。建模策略基于不同开关设置的微分方程的解,并利用 Y 矩阵来表示浮动 SR。所提出的模型已经针对参考 130nm CMOS 技术的周期性稳态 (PSS) 和周期性 AC (PAC) 模拟进行了验证。结果显示平均和最大误差分别低于 0.53% 和 5.15%。作为进一步的验证,一阶有源低通滤波器采用相同的技术实现,截止频率可在 1.68Hz 至 1.46kHz 范围内调谐。截止频率估计中的平均和最大误差低于 3。
更新日期:2021-08-02
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