The switching frequency of power electronic devices has become much higher than before, which brings great challenges to real-time simulators. The small time step in high switching frequency simulations remarkably increases the difficulty to satisfy the real-time requirement. This article realizes the accurate real-time simulation of a solid-state transformer (SST) with a switching frequency of 50 kHz at the time step of 250 ns on a field-programmable gate array (FPGA)-based platform. The hybrid companion circuit modeling method and the compact-electromagnetic transient program (EMTP) algorithm are proposed in this article to make sure that the simulation loop can complete in less than $1~\mu \text{s}$ . The hybrid companion circuit modeling method can avoid too many digits used in representing simulation variables. The compact-EMTP algorithm is designed by combining the sequential computation tasks of the traditional EMTP to fully utilize the parallelized hardware structure of the FPGA. Besides, a circuit partition method is adopted to further parallelize the circuit solution of the SST circuit. In these ways, the simulation loop of the SST can be completed in 38 clock cycles (about 237.5 ns). The simulation results show that the real-time simulation waveforms are almost consistent with those of the off-line simulation software. Besides, the hardware-in-the-loop (HIL) simulation can also be performed on this platform to test the control functions of the SST.

中文翻译：

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基于 FPGA 的亚微秒级实时仿真开关频率为 50 kHz 的固态变压器

电力电子器件的开关频率比以前高很多，这给实时模拟器带来了很大的挑战。高开关频率仿真中的小时间步长显着增加了满足实时性要求的难度。本文在基于现场可编程门阵列 (FPGA) 的平台上实现了对开关频率为 50 kHz、时间步长为 250 ns 的固态变压器 (SST) 的精确实时仿真。本文提出了混合伴随电路建模方法和紧凑电磁瞬态程序（EMTP）算法，以确保仿真回路可以在不到 $1~\mu \text{s}$ . 混合配套电路建模方法可以避免在表示仿真变量时使用过多的数字。紧凑型EMTP算法是结合传统EMTP的顺序计算任务，充分利用FPGA的并行化硬件结构而设计的。此外，还采用了电路划分的方法，进一步并行化了SST电路的电路方案。通过这些方式，SST 的仿真循环可以在 38 个时钟周期（约 237.5 ns）内完成。仿真结果表明，实时仿真波形与离线仿真软件的波形基本一致。此外，还可以在该平台上进行硬件在环 (HIL) 仿真，以测试 SST 的控制功能。