当前位置: X-MOL 学术ACM J. Emerg. Technol. Comput. Syst. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
SILVerIn: Systematic Integrity Verification of Printed Circuit Board Using JTAG Infrastructure
ACM Journal on Emerging Technologies in Computing Systems ( IF 2.1 ) Pub Date : 2021-06-30 , DOI: 10.1145/3460232
Shubhra Deb Paul 1 , Swarup Bhunia 1
Affiliation  

A printed circuit board (PCB) provides necessary mechanical support to an electronic system and acts as a platform for connecting electronic components. Counterfeiting and in-field tampering of PCBs have become significant security concerns in the semiconductor industry as a result of increasing untrusted entities in the supply chain. These counterfeit components may result in performance degradation, profit reduction, and reputation risk for the manufacturers. While Integrated Circuit (IC) level authentication using physical unclonable functions (PUFs) has been widely investigated, countermeasures at the PCB level are scarce. These approaches either suffer from significant overhead issues, or opportunistic counterfeiters can breach them like clockwork. Besides, they cannot be extended to system-level (both chip and PCB together), and their applications are also limited to a specific purpose (i.e., either counterfeiting or tampering). In this article, we introduce SILVerIn , a novel systematic approach to verify the authenticity of all chips used in a PCB as well as the board for combating attacks such as counterfeiting, cloning, and in-field malicious modifications. We develop this approach by utilizing the existing boundary scan architecture (BSA) of modern ICs and PCBs. As a result, its implementation comes at a negligible (∼0.5%) hardware overhead. SILVerIn is integrated into a PCB design during the manufacturing phase. We implement our technique on a custom hardware platform consisting of an FPGA and a microcontroller. We incorporate the industry-standard JTAG (Joint Test Action Group) interface to transmit test data into the BSA and perform hands-on measurement of supply current at both chip and PCB levels on 20 boards. We reconstruct these current values to digital signatures that exhibit high uniqueness, robustness, and randomness features. Our approach manifests strong reproducibility of signatures at different supply voltage levels, even with a low-resolution measurement setup. SILVerIn also demonstrates a high resilience against machine learning-based modeling attacks, with an average prediction accuracy of ∼51%. Finally, we conduct intentional alteration experiments by replacing the on-board FPGA to replicate the scenario of PCB tampering, and the results indicate successful detection of in-field modifications in a PCB.

中文翻译:

SILVerIn:使用 JTAG 基础设施对印刷电路板进行系统完整性验证

印刷电路板 (PCB) 为电子系统提供必要的机械支撑,并充当连接电子元件的平台。由于供应链中不受信任的实体越来越多,PCB 的伪造和现场篡改已成为半导体行业的重大安全问题。这些假冒组件可能会导致制造商的性能下降、利润减少和声誉风险。虽然使用物理不可克隆功能 (PUF) 的集成电路 (IC) 级身份验证已被广泛研究,但 PCB 级的对策却很少。这些方法要么遭受重大的开销问题,要么机会主义的造假者可以像发条一样破坏它们。此外,它们不能扩展到系统级(芯片和PCB一起),并且它们的应用也仅限于特定目的(即伪造或篡改)。在这篇文章中,我们介绍银银,一种新颖的系统方法,用于验证 PCB 中使用的所有芯片以及电路板的真实性,以打击伪造、克隆和现场恶意修改等攻击。我们通过利用现代 IC 和 PCB 的现有边界扫描架构 (BSA) 来开发这种方法。因此,其实现的硬件开销可以忽略不计(~0.5%)。银银在制造阶段集成到 PCB 设计中。我们在由 FPGA 和微控制器组成的定制硬件平台上实施我们的技术。我们采用行业标准 JTAG(联合测试行动组)接口将测试数据传输到 BSA,并在 20 块板上对芯片级和 PCB 级的电源电流进行手动测量。我们将这些当前值重建为具有高唯一性、鲁棒性和随机性特征的数字签名。我们的方法表现出在不同电源电压水平下签名的高度可重复性,即使使用低分辨率测量设置也是如此。银银还展示了对基于机器学习的建模攻击的高弹性,平均预测准确率约为 51%。最后,我们通过更换板载 FPGA 来进行有意更改实验,以复制 PCB 篡改的场景,结果表明成功检测到 PCB 中的现场修改。
更新日期:2021-06-30
down
wechat
bug