当前位置: X-MOL 学术Concurr. Comput. Pract. Exp. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
Execution-Cache-Memory modeling and performance tuning of sparse matrix-vector multiplication and Lattice quantum chromodynamics on A64FX
Concurrency and Computation: Practice and Experience ( IF 1.5 ) Pub Date : 2021-08-01 , DOI: 10.1002/cpe.6512
Christie Alappat 1 , Nils Meyer 2 , Jan Laukemann 1 , Thomas Gruber 1 , Georg Hager 1 , Gerhard Wellein 1 , Tilo Wettig 2
Affiliation  

The A64FX CPU is arguably the most powerful Arm-based processor design to date. Although it is a traditional cache-based multicore processor, its peak performance and memory bandwidth rival accelerator devices. A good understanding of its performance features is of paramount importance for developers who wish to leverage its full potential. We present an architectural analysis of the A64FX used in the Fujitsu FX1000 supercomputer at a level of detail that allows for the construction of Execution-Cache-Memory performance models for steady-state loops. In the process we identify architectural peculiarities that point to viable generic optimization strategies. After validating the model using simple streaming loops we apply the insight gained to sparse matrix-vector multiplication (SpMV) and the domain wall (DW) kernel from quantum chromodynamics. For SpMV we show why the compressed row storage (CRS) matrix storage format is not a good practical choice on this architecture and how the SELL-C-urn:x-wiley:cpe:media:cpe6512:cpe6512-math-0001 format can achieve bandwidth saturation. For the DW kernel we provide a cache-reuse analysis and show how an appropriate choice of data layout for complex arrays can realize memory-bandwidth saturation in this case as well. A comparison with state-of-the-art high-end Intel Cascade Lake AP and Nvidia V100 systems puts the capabilities of the A64FX into perspective. We also explore the potential for power optimizations using the tuning knobs provided by the Fugaku system, achieving energy savings of about 31% for SpMV and 18% for DW.

中文翻译:

A64FX 上稀疏矩阵向量乘法和晶格量子色动力学的执行-缓存-内存建模和性能调整

A64FX CPU 可以说是迄今为止最强大的基于 Arm 的处理器设计。虽然它是传统的基于缓存的多核处理器,但其峰值性能和内存带宽可与加速器设备相媲美。对于希望充分发挥其潜力的开发人员来说,对其性能特性的良好理解至关重要。我们对富士通 FX1000 超级计算机中使用的 A64FX 进行了架构分析,其详细程度允许为稳态循环构建执行-缓存-内存性能模型。在此过程中,我们确定了指向可行的通用优化策略的架构特性。在使用简单的流循环验证模型后,我们将获得的见解应用于稀疏矩阵向量乘法 (SpMV) 和量子色动力学的畴壁 (DW) 内核。C-骨灰盒:x-wiley:cpe:媒体:cpe6512:cpe6512-math-0001格式可以达到带宽饱和。对于 DW 内核,我们提供了缓存重用分析,并展示了在这种情况下,为复杂数组选择适当的数据布局如何实现内存带宽饱和。与最先进的高端 Intel Cascade Lake AP 和 Nvidia V100 系统进行比较,可以看出 A64FX 的功能。我们还探索了使用 Fugaku 系统提供的调节旋钮进行功率优化的潜力,实现了 SpMV 约 31% 和 DW 约 18% 的节能。
更新日期:2021-08-01
down
wechat
bug