In this paper, a new 2D analytical model for surface potential of a gate stacked triple metal Vertical TFET with n + delta doped layer (δ-doped n + SiGe GS-TMG-VTFET) is presented. The parabolic approximation process is used to solve the Poisson equation in terms of channel surface potential and electrical field respectively. The proposed method consists of a dual modulation effect that controls the surface potential at both the interface of the source and drains with the channel. This structure comprises SiO₂ and HfO₂ as gate-stacked materials to extend the control of the gate terminal over the channel. In addition, the proposed TMG-VTFET outperforms the surface potential results in terms of input and output characteristics like gate-source voltage (V_GS) and drain-source voltage (V_DS), gate oxide, and SiGe mole fraction. Finally, we obtained the expression of the channel surface potential, which involves the biasing variation of source and drain terminal. Our proposed model is accounting the variable of kane model in respect to extract the drain current characteristics. It can be modeled by integrating band-to-band tunneling generation rate using suitable boundary conditions. Now, efficiency of the proposed model for both the surface potential and drain current has been confirmed by comparing its analytical outcomes with the TCAD results.

在本文中，提出了具有 n + delta 掺杂层（δ 掺杂 n + SiGe GS-TMG-VTFET）的栅堆叠三金属垂直 TFET 表面电位的新二维分析模型。抛物线近似过程用于分别根据通道表面电位和电场来求解泊松方程。所提出的方法包括双重调制效应，该效应控制源极和漏极与沟道的界面处的表面电位。该结构包含SiO ₂和HfO ₂作为栅极堆叠材料，以将栅极端子的控制扩展到沟道之上。此外，所提出的 TMG-VTFET 在输入和输出特性方面优于表面电位结果，如栅源电压 (V _GS) 和漏源电压 (V _DS )、栅极氧化物和 SiGe 摩尔分数。最后，我们得到了沟道表面电位的表达式，其中涉及源极和漏极端的偏置变化。我们提出的模型在提取漏极电流特性方面考虑了凯恩模型的变量。它可以通过使用合适的边界条件对带间隧道发生率进行积分来建模。现在，通过将其分析结果与 TCAD 结果进行比较，已经证实了所提出的模型对于表面电位和漏电流的效率。