In this article, a family of dual-boost bridgeless five-level rectifiers with common-core inductors is proposed, which is composed of two coupled inductors, one bidirectional switch unit, and the dual-boost bridgeless power factor correction (PFC) rectifier. A bidirectional switch unit is embedded in the midpoint between the two capacitors and the bridge arm of the dual-boost bridgeless PFC (DBBL-PFC) to directly generate the five-level waveforms in each line cycle. The proposed topologies have the characteristics of lower voltage/current stresses and low total harmonic distortion. Additionally, the proposed five-level rectifiers employ a pair of common-core coupled inductors at the input side to replace the inherent independent inductors to improve the core utilization and the power density. First, the characteristics of the proposed topologies are analyzed and compared, and one of the topologies is taken as an example to illustrate its operating principle. Second, the modulation strategy with strong topology applicability and control system is designed for the proposed topologies. The advantage of the proposed pulsewidth modulation method is that it only needs to change the pulse distribution of the five-level topology to realize the five-level rectification, and the program debugging is simple. Then, the coupled inductors are designed, compared, and analyzed by the equivalent model in detail. Finally, a rated output of 1 kW/400 V experimental prototype is built, and the experimental results are presented to demonstrate the performance and effectiveness of the proposed topologies.

中文翻译：

---

具有共芯电感器的双升压无桥五电平整流器系列


本文提出了一种具有共芯电感的双升压无桥五电平整流器系列，该系列由两个耦合电感器、一个双向开关单元和双升压无桥功率因数校正（PFC）整流器组成。双向开关单元嵌入在两个电容器和双升压无桥PFC（DBBL-PFC）的桥臂之间的中点，以在每个线路周期直接生成五电平波形。所提出的拓扑具有较低的电压/电流应力和较低的总谐波失真的特点。此外，所提出的五电平整流器在输入侧采用一对共磁芯耦合电感器来代替固有的独立电感器，以提高磁芯利用率和功率密度。首先，对所提出的拓扑的特点进行了分析和比较，并以其中一种拓扑为例说明其工作原理。其次，针对所提出的拓扑设计了具有强拓扑适用性的调制策略和控制系统。所提出的脉宽调制方法的优点是只需改变五电平拓扑的脉冲分布即可实现五电平整流，且程序调试简单。然后，利用等效模型对耦合电感进行了详细的设计、比较和分析。最后，搭建了额定输出为1 kW/400 V的实验样机，并给出了实验结果以证明所提出的拓扑的性能和有效性。