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Impact of interfacial trap states on achieving bias stability in polymer field-effect transistors
Microelectronic Engineering ( IF 2.6 ) Pub Date : 2021-07-26 , DOI: 10.1016/j.mee.2021.111602
M. Javaid Iqbal 1 , M. Zahir Iqbal 2 , Tahmina Afzal 1 , Mohsin Ali Raza 3 , Kashif Saghir 1 , M. Akram Raza 1 , Shahid Atiq 1 , Saira Riaz 1 , Shahzad Naseem 1
Affiliation  

Low operational stability and undesirable shift of electrical properties at ambient conditions are the major barriers in the commercialization of organic field-effect transistors (OFETs). In this study, we report an improvement in operational stability of solution-processable polymer Poly[2,5-(2-octyldodecyl)-3,6-diketopyrrolopyrrole-alt-5,5-(2,5-di(thien-2-yl)thieno[3,2-b]thiophene)] (DPPDTT) based OFETs by applying bias stress for short times. Two types of devices were fabricated using i) bare Si3N4 as gate dielectric that offers higher interfacial traps and ii) using an additional layer of PMMA along with Si3N4 that offers lower interfacial traps. The OFET with PMMA layer shows better performance i.e. threshold voltage around 15 V, mobility~0.2 cm2/V.s and current on/off ratio in the range of 106. The bias stress measurements show the initial decrease in the performance parameters in both devices. However, the device with lower traps shows a smaller decrease in the performance parameters and achieves a stable performance when devices are put under continuous gate bias stress, while the high trap state device continued to degrade. The reported results provide a route to achieve good stability in the electrical performance of OFETs in ambient conditions.



中文翻译:

界面陷阱态对聚合物场效应晶体管偏置稳定性的影响

环境条件下的低运行稳定性和电特性的不良变化是有机场效应晶体管 (OFET) 商业化的主要障碍。在这项研究中,我们报告了溶液可加工聚合物 Poly[2,5-(2-octyldodecyl)-3,6-diketopyrrolopyrrole- alt -5,5-(2,5-di(thien-2 -yl)噻吩并[3,2- b ]噻吩)](DPPDTT)通过短时间施加偏置应力来实现。使用 i) 裸 Si 3 N 4作为提供更高界面陷阱的栅极电介质和 ii) 使用额外的 PMMA 层以及 Si 3 N 4制造两种类型的器件提供较低的界面陷阱。具有PMMA 层的OFET 表现出更好的性能,即15 V 左右的阈值电压、迁移率~0.2 cm 2 /Vs 和10 6范围内的电流开/关比。偏置应力测量表明两种器件的性能参数都出现了初始下降。然而,当器件置于连续的栅极偏置应力下时,具有较低陷阱的器件的性能参数下降较小,并实现稳定的性能,而高陷阱态器件则继续退化。报告的结果提供了在环境条件下实现 OFET 电性能良好稳定性的途径。

更新日期:2021-08-05
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