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A mathematical programming method for constructing the shortest interconnection VLSI arrays
Integration ( IF 2.2 ) Pub Date : 2021-07-24 , DOI: 10.1016/j.vlsi.2021.07.004
Hao Ding 1, 2 , Junyan Qian 1, 2 , Lingzhong Zhao 1 , Zhongyi Zhai 1
Affiliation  

Mesh-connected processor array is an extensively investigated architecture in parallel processing. Massive studies have addressed the problem of using reconfiguration algorithms to solve the fault tolerance of faulty mesh-connected processor arrays. However, the subarrays generated by the previous studies still contain large interconnection length, which will lead to the increase of capacitance, power dissipation and dynamic communication cost. First, a mathematical model is established for the array reconfiguration. Then, the proposed method treats the interconnections between each PEs as a function with different integer variables, which can be solved by using effective integer programming techniques. Finally, an effective solver is called to find the optimal solution. Simulation results show that the proposed method can reduce the interconnection length of the array in the row and column directions simultaneously, thereby generating a subarray with the shortest interconnection length. On a 32 × 32 host array with fault density of 30%, the total interconnection length of the subarray can be reduced by 8.36% compared with state-of-the-art, and the average interconnection length can be reduced by 39.30%, which is more closer to the lower bound.



中文翻译:

一种构建最短互连超大规模集成电路阵列的数学规划方法

网状连接处理器阵列是并行处理中广泛研究的架构。大量研究已经解决了使用重新配置算法来解决故障网状连接处理器阵列的容错问题。然而,以往研究产生的子阵列仍然包含较大的互连长度,这将导致电容、功耗和动态通信成本的增加。首先,建立阵列重构的数学模型。然后,所提出的方法将每个PE之间的互连视为具有不同整数变量的函数,可以通过使用有效的整数规划技术来解决。最后,调用一个有效的求解器来寻找最优解。仿真结果表明,该方法可以同时减小阵列在行和列方向上的互连长度,从而生成互连长度最短的子阵列。在故障密度为 30% 的 32×32 主机阵列上,子阵列的总互连长度与 state-of-the-art 相比可减少 8.36%,平均互连长度可减少 39.30%,即更接近下限。

更新日期:2021-07-29
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