In this article, we modeled, analyzed, and evaluated a large-scale memristor crossbar array in a neuromorphic system for a deep neural network (DNN) considering signal integrity (SI). Since hardware-based DNN using a memristor crossbar array operates in an analog way, it has serious reliability problems caused by interconnects, driver, and nonlinear memory cells. The interconnects including an on-chip signal and power/ground (P/G) mesh were modeled as circuit parameters from a full 3-D-electromagnetic (EM) simulation. The memristor was electrically modeled including its nonlinear characteristics. These models were configured into a 512 ×512 memristor crossbar array with drivers and peripheral circuits for the implementation of DNN. Then, we analyzed the component-level SI and nonlinearity for the interconnects and memristors, and the system level for the total array configuration. Finally, the regression of DNN in the memristor crossbar array was evaluated for verification of the analysis. All the analyzed SI and nonlinearity effects from the interconnects, memristor, and array configuration affected the regression. As the input voltage level decreased, the effect of the SI effect on accuracy became more dominant than that of the nonlinearity of the memristor effect. In terms of SI, it was verified that there is a tradeoff relationship between IR drop and crosstalk according to the interconnects' size. Finally, the accuracy and power consumption were verified according to the array configuration in the system level as an important issue of the memristor crossbar array. Through the overall process, it was possible to analyze how the SI and nonlinearity effects affect the computational results in the neuromorphic system.

中文翻译：

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深度神经网络高速神经形态系统中大规模忆阻器交叉阵列的信号完整性建模和分析


在本文中，我们对考虑信号完整性 (SI) 的深度神经网络 (DNN) 的神经形态系统中的大型忆阻器交叉阵列进行了建模、分析和评估。由于使用忆阻器交叉阵列的基于硬件的 DNN 以模拟方式运行，因此它存在由互连、驱动器和非线性存储单元引起的严重可靠性问题。包括片上信号和电源/接地 (P/G) 网格在内的互连被建模为来自完整 3D 电磁 (EM) 仿真的电路参数。对忆阻器进行了电气建模，包括其非线性特性。这些模型被配置成带有驱动器和外围电路的 512 ×512 忆阻器交叉阵列，用于实现 DNN。然后，我们分析了互连和忆阻器的组件级 SI 和非线性，以及整个阵列配置的系统级。最后，评估了忆阻器交叉阵列中 DNN 的回归，以验证分析。所有分析的 SI 和来自互连、忆阻器和阵列配置的非线性效应都会影响回归。随着输入电压电平降低，SI 效应对精度的影响变得比忆阻器效应的非线性影响更显着。就 SI 而言，已验证根据互连尺寸，IR 压降和串扰之间存在权衡关系。最后，作为忆阻器交叉阵列的重要问题，在系统级根据阵列配置对精度和功耗进行了验证。通过整个过程，可以分析SI和非线性效应如何影响神经形态系统的计算结果。