In this communication, a current feedback operational amplifier (CFOA) based novel architecture of voltage-mode analog multiplier/divider circuit has been proposed. The proposed circuit employs a single CFOA and four MOSFETs. The multiplier circuit can operate in four quadrant modes, whereas, the divider circuit can operate in two quadrant modes. The applications of the proposed multiplier circuit in amplitude modulator, squarer, and frequency doubler circuit have also been presented. To check the robustness of the proposed circuit, mismatch analysis, process corner-voltage-temperature analysis, and Monte-Carlo simulations have been performed. Noise analysis has also been carried out and the output noise for multiplier and divider circuits are found to be below 0.28 μV /sqrt(Hz). The presented circuit has been simulated with CMOS CFOA implemented using 0.18 μm TSMC technology parameters.

在本次通信中，提出了一种基于电流反馈运算放大器 (CFOA) 的电压模式模拟乘法器/除法器电路的新型架构。建议的电路采用单个 CFOA 和四个 MOSFET。乘法器电路可以在四象限模式下工作，而分频器电路可以在两个象限模式下工作。还介绍了所提出的乘法器电路在幅度调制器、平方器和倍频器电路中的应用。为了检查所提出的电路的稳健性，已经执行了失配分析、过程角电压-温度分析和蒙特卡罗模拟。还进行了噪声分析，发现乘法器和除法器电路的输出噪声低于 0.28 μV /sqrt(Hz)。