With the prevailing of Internet-of-Things (IoT) technology, information security for ever-growing connected devices is an inevitable issue and gaining more attention. However, implementation of cryptography algorithms on battery-powered IoT devices is challenging due to limited power-budget. In this paper, we present an energy-efficient crypto-coprocessor. This coprocessor is designed with a unified pipelined structure for cryptography primitives of 128-bit or 256-bit data path and supports cryptography algorithms including AES, ECC and SHA. Since the clock tree and the sequential circuits dissipate a large percentage of the chip power, a conditional-charged flip-flop is proposed to reduce the clock tree power. Our design is integrated with an open-sourced RISC-V core as a crypto-extension, and shows both good flexibility and high energy-efficiency. This work is implemented in 28 nm technology and the power consumption for different cryptography applications is evaluated with post-layout simulation. When simulated with NIST prime fields curve P-256 and binary fields curve K-233, the energy consumed for one base point scalar multiplication is 43.54 $\mathrm{\mu }$J and 20.40 $\mathrm{\mu }$J, respectively. The proposed design consumes 0.0568 nJ/bit and 0.0288 nJ/bit for the AES-GCM mode and the AES-CBC mode, respectively. As for SHA-256, each bit requires 0.0874 nJ. Compared with previous works, this work provides both flexibility and high energy performance.

随着物联网（IoT）技术的普及，不断增长的连接设备的信息安全是一个不可避免的问题，并受到越来越多的关注。然而，由于功率预算有限，在电池供电的物联网设备上实施加密算法具有挑战性。在本文中，我们提出了一种节能的加密协处理器。该协处理器采用统一的流水线结构设计，适用于 128 位或 256 位数据路径的密码原语，支持 AES、ECC 和 SHA 等密码算法。由于时钟树和时序电路消耗了很大比例的芯片功率，因此提出了条件充电触发器来降低时钟树功率。我们的设计与开源 RISC-V 内核集成作为加密扩展，并显示出良好的灵活性和高能效。这项工作是在 28 nm 技术中实现的，不同密码学应用的功耗是通过布局后模拟来评估的。用 NIST 素场曲线 P-256 和二元场曲线 K-233 模拟时，一个基点标量乘法消耗的能量为 43.54$\mathrm{\mu }$J 和 20.40 $\mathrm{\mu }$J，分别。对于 AES-GCM 模式和 AES-CBC 模式，所提出的设计分别消耗 0.0568 nJ/bit 和 0.0288 nJ/bit。至于 SHA-256，每位需要 0.0874 nJ。与之前的工作相比，这项工作提供了灵活性和高能量性能。