Majority inverter graph is a logic representation structure that along with its algebraic properties synthesizes circuits with improved area, delay, and speed metrics, as compared to conventional And-Invert graph (AIG) realization. In this paper, we propose mMIG synthesis approach, where we aim to minimize the number of inverters in such circuits by adopting minority logic in addition to majority and inversion operations in the logic representation. We propose a set of Boolean transformation methods and derived theorems for minority, majority, and inverter operations. We demonstrate that minority operation in addition to majority and inversion operations significantly optimizes the hardware footprint of combinational circuits and cryptographic primitives, such as linear operations and substitution boxes in several lightweight block ciphers. The area optimization is considered with reduction in count of complemented edges or inversion operations. As results demonstrate, the inversion operations have been reduced from 57.7% to 93.3% in mMIG synthesis approach as compared to MIG logic synthesis in EPFL combinational benchmark suite. In round function implementations of lightweight block ciphers such as SIMON, and ARX boxes such as MARX-2 and SPECKEY, the count of complemented edges in mMIG synthesis technique has been reduced by almost 50% as compared to that in MIG based implementations.

多数反相图是一种逻辑表示结构，与传统的与反相图 (AIG) 实现相比，它连同其代数特性合成了具有改进的面积、延迟和速度指标的电路。在本文中，我们提出了mMIG综合方法，我们的目标是通过采用少数逻辑以及逻辑表示中的多数和反转操作来最小化此类电路中的反相器数量。我们为少数、多数和逆变器操作提出了一组布尔变换方法和导出定理。我们证明了除多数和反转运算之外的少数运算显着优化了组合电路和密码原语的硬件占用空间，例如几个轻量级分组密码中的线性运算和替换框。区域优化是通过减少补充边或反演操作的数量来考虑的。结果表明，反演操作已从 57 次减少。7% 到 93 .与 EPFL 组合基准套件中的 MIG 逻辑合成相比，mMIG 合成方法的 3%。在 SIMON 等轻量级分组密码和 MARX-2 和 SPECKEY 等 ARX 盒的轮函数实现中，与基于 MIG 的实现相比，mMIG 合成技术中互补边的数量减少了近 50%。