The ubiquity of multicore processors has led programmers to write parallel and concurrent applications to take advantage of the underlying hardware and speed up their executions. In this context, Transactional Memory (TM) has emerged as a simple and effective synchronization paradigm, via the familiar abstraction of atomic transactions. After many years of intense research, major processor manufacturers (including Intel) have recently released mainstream processors with hardware support for TM (HTM). In this work, we study a relevant issue with great impact on the performance of HTM. Due to the optimistic and inherently limited nature of HTM, transactions may have to be aborted and restarted numerous times, without any progress guarantee. As a result, it is up to the software library that regulates the HTM usage to ensure progress and optimize performance. Transaction scheduling is probably one of the most well-studied and effective techniques to achieve these goals. However, these recent mainstream HTMs have some technical limitations that prevent the adoption of known scheduling techniques: unlike software implementations of TM used in the past, existing HTMs provide limited or no information on which memory regions or contending transactions caused the abort. To address this crucial issue for HTMs, we propose S eer , a software scheduler that addresses precisely this restriction of HTM by leveraging on an online probabilistic inference technique that identifies the most likely conflict relations and establishes a dynamic locking scheme to serialize transactions in a fine-grained manner. The key idea of our solution is to constrain the portions of parallelism that are affecting negatively the whole system. As a result, this not only prevents performance reduction but also in fact unveils further scalability and performance for HTM. Via an extensive evaluation study, we show that S eer improves the performance of the Intel’s HTM by up to 3.6×, and by 65% on average across all concurrency degrees and benchmarks on a large processor with 28 cores.

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先知

多核处理器的普遍存在导致程序员编写并行和并发应用程序以利用底层硬件并加快其执行速度。在这种情况下，通过熟悉的原子事务抽象，事务内存 (TM) 已成为一种简单而有效的同步范式。经过多年的深入研究，主要处理器制造商（包括英特尔）最近发布了硬件支持TM（HTM）的主流处理器。在这项工作中，我们研究了一个对 HTM 性能有很大影响的相关问题。由于 HTM 的乐观和固有的局限性，交易可能不得不多次中止和重新启动，而没有任何进度保证。因此，由管理 HTM 使用的软件库来确保进度和优化性能。事务调度可能是实现这些目标的最充分研究和最有效的技术之一。然而，这些最近的主流 HTM 有一些技术限制，阻碍了采用已知的调度技术：与过去使用的 TM 的软件实现不同，现有的 HTM 提供有限的或不提供有关哪些内存区域或竞争事务导致中止的信息。为了解决 HTM 的这个关键问题，我们建议 S 与过去使用的 TM 软件实现不同，现有 HTM 提供的信息有限或不提供有关哪些内存区域或竞争事务导致中止的信息。为了解决 HTM 的这个关键问题，我们建议 S 与过去使用的 TM 软件实现不同，现有 HTM 提供的信息有限或不提供有关哪些内存区域或竞争事务导致中止的信息。为了解决 HTM 的这个关键问题，我们建议 S呃，一个软件调度程序，通过利用在线概率推理技术来精确解决 HTM 的这种限制，该技术识别最可能的冲突关系并建立动态锁定方案以细粒度方式序列化事务。我们解决方案的关键思想是限制对整个系统产生负面影响的并行性部分。因此，这不仅可以防止性能下降，而且实际上还为 HTM 提供了进一步的可扩展性和性能。通过广泛的评估研究，我们表明 S呃将英特尔 HTM 的性能提高了 3.6 倍，在 28 核大型处理器上的所有并发度和基准测试中平均提高了 65%。