Given the complexity of modern systems-on-chip, hardware-assisted verification is an integral part of the chip-design process. However, chip designers often need to choose between richly featured but expensive emulation platforms or faster, cheaper, but less debuggable FPGA prototyping solutions. FireSim, an open-source, FPGA-accelerated hardware emulation platform hosted in the public cloud, attempts to accessibly offer the best of both worlds. This article highlights two new FireSim capabilities that help realize this goal: multicycle resource optimizations, which can enable an eight-fold increase emulated core count, and FPGA-agnostic support for multiclock systems. These supplement existing FireSim features which provide a foundation for productive emulation, including a cloud manager to automatically scale out experiments and a rich debug toolkit.

中文翻译：

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FireSim 中多时钟系统的可访问、FPGA 资源优化仿真


鉴于现代片上系统的复杂性，硬件辅助验证是芯片设计过程中不可或缺的一部分。然而，芯片设计人员通常需要在功能丰富但昂贵的仿真平台或更快、更便宜但可调试性较差的 FPGA 原型解决方案之间进行选择。 FireSim 是一个托管在公共云中的开源 FPGA 加速硬件仿真平台，试图轻松地提供两全其美的功能。本文重点介绍了有助于实现这一目标的 FireSim 的两项新功能：多周期资源优化（可将仿真核心数量增加八倍）以及对多时钟系统的与 FPGA 无关的支持。这些补充了现有的 FireSim 功能，为高效仿真提供了基础，包括自动扩展实验的云管理器和丰富的调试工具包。