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A survey of hardware architectures for generative adversarial networks
Journal of Systems Architecture ( IF 3.7 ) Pub Date : 2021-06-29 , DOI: 10.1016/j.sysarc.2021.102227
Nivedita Shrivastava , Muhammad Abdullah Hanif , Sparsh Mittal , Smruti Ranjan Sarangi , Muhammad Shafique

Recent years have witnessed a significant interest in the “generative adversarial networks” (GANs) due to their ability to generate high-fidelity data. Many models of GANs have been proposed for a diverse range of domains ranging from natural language processing to image processing. GANs have a high compute and memory requirements. Also, since they involve both convolution and deconvolution operation, they do not map well to the conventional accelerators designed for convolution operations. Evidently, there is a need of customized accelerators for achieving high efficiency with GANs. In this work, we present a survey of techniques and architectures for accelerating GANs. We organize the works on key parameters to bring out their differences and similarities. Finally, we present research challenges that are worthy of attention in near future. More than summarizing the state-of-art, this survey seeks to spark further research in the field of GAN accelerators.



中文翻译:

生成对抗网络的硬件架构调查

近年来,人们对“生成对抗网络”(GAN)产生了浓厚的兴趣,因为它们能够生成高保真数据。已经为从自然语言处理到图像处理的各种领域提出了许多 GAN 模型。GAN 具有很高的计算和内存要求。此外,由于它们同时涉及卷积和反卷积运算,因此它们不能很好地映射到为卷积运算设计的传统加速器。显然,需要定制的加速器来实现 GAN 的高效率。在这项工作中,我们对加速 GAN 的技术和架构进行了调查。我们组织关键参数的工作,以找出它们的异同。最后,我们提出了在不久的将来值得关注的研究挑战。

更新日期:2021-07-05
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