Operating circuits under cryogenic conditions is effective for a large spectrum of applications. However, the refrigeration requirement for the cooling of cryogenic systems introduces serious issues in terms of power dissipation. Gain-cell embedded dynamic random access memory (GC-eDRAM) is a low-area, logic-compatible embedded memory alternative to static random access memory (SRAM), which has the potential to provide ultralow-power operation under cryogenic conditions due to the lower leakages at these temperatures. In this article, we present the first comparative design exploration of GC-eDRAM under cryogenic conditions performed with transistor models characterized based on actual silicon measurements under temperatures as low as 77 K. Our study shows that the two-transistor (2T)-based GC-eDRAM configurations turn out to be the best solutions for very low-temperature operation. In particular, the 2T mixed GC-eDRAM configurations allow read sensing margin improvements (up to 99%) within the 2T-based configurations while at the same time excel in terms of data retention time (+44%) and power consumption (-27%) when compared to more complex GC-eDRAM topologies. Moreover, even better improvements in terms of area (-73%), leakage power (-97%), retention power (-76%), and energy (-66%) are observed when compared to conventional 6T-SRAM.

中文翻译：

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低温操作下的 Gain-Cell 嵌入式 DRAM——首次研究


在低温条件下运行电路对于多种应用都是有效的。然而，低温系统冷却的制冷要求带来了功耗方面的严重问题。增益单元嵌入式动态随机存取存储器 (GC-eDRAM) 是一种小面积、逻辑兼容的嵌入式存储器，可替代静态随机存取存储器 (SRAM)，由于其在这些温度下泄漏较低。在本文中，我们首次在低温条件下对 GC-eDRAM 进行了比较设计探索，使用基于低至 77 K 温度下实际硅测量的晶体管模型进行表征。我们的研究表明，基于双晶体管 (2T) 的 GC -eDRAM 配置被证明是极低温运行的最佳解决方案。特别是，2T 混合 GC-eDRAM 配置可在基于 2T 的配置中实现读取传感裕度提高（高达 99%），同时在数据保留时间 (+44%) 和功耗 (-27 %) 与更复杂的 GC-eDRAM 拓扑相比。此外，与传统的 6T-SRAM 相比，在面积 (-73%)、泄漏功率 (-97%)、保持功率 (-76%) 和能量 (-66%) 方面甚至有更好的改进。