Physical layer signal processing algorithms in the wireless domain are seeing increased use of machine learning algorithms, especially Bayesian methods. This work presents the hardware architecture and implementation of a vector processor for one such application, Bayesian channel estimation (CE) (BCE). The BCE vector processor supports a generic instruction set with a supplement of specialized instructions to realize Bayesian algorithms in the signal processing context. The vector processor is designed to work as an accelerator in a system-on-chip (SoC) with an AHB/AXI bus interface or as stand-alone unit. The vector processor achieves more than $4\times $ improvement in performance when compared with a traditional CE algorithm running on a commercial vector processor. To the best of authors knowledge, this is a first known hardware implementation of a variational Bayesian inference algorithm for a wireless communication application.

中文翻译：

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用于平均场贝叶斯信道估计的矢量处理器

无线域中的物理层信号处理算法越来越多地使用机器学习算法，尤其是贝叶斯方法。这项工作介绍了一种用于贝叶斯信道估计 (CE) (BCE) 的矢量处理器的硬件架构和实现。BCE 向量处理器支持通用指令集，并补充了专门的指令，以在信号处理上下文中实现贝叶斯算法。矢量处理器旨在用作具有 AHB/AXI 总线接口的片上系统 (SoC) 中的加速器或作为独立单元。矢量处理器实现了超过 $4\times $ 与在商业矢量处理器上运行的传统 CE 算法相比，性能有所提高。据作者所知，这是用于无线通信应用的变分贝叶斯推理算法的第一个已知硬件实现。