Due to the thin InAlN barrier layer, leakage current is a serious problem in InAlN/GaN high-electron-mobility transistors (HEMTs). The InGaN back-barrier can raise the conduction band of the GaN buffer layer and enhance the carrier confinement, resulting in a reduced buffer leakage current. The surface oxidation treatment prior to gate deposition can form an oxide layer and reduce the barrier leakage current. In this study, using both technologies, a record low off current (I_off) and a record high on/off current (I_on/I_off) ratio are achieved on InAlN/GaN HEMTs on silicon substrate. The InAlN/GaN HEMT with a 70-nm rectangular gate presents a low I_off of 7.15 × 10^-8 A/mm, a high I_on/I_off ratio of 2.20 × 10⁷, an average subthreshold swing (SS) of 69 mV/dec, and a low drain-induced barrier lowering (DIBL) of 90 mV/V. The InAlN/GaN HEMT with a 70-nm T-shaped gate exhibits a low I_off of 3.26 × 10^-8 A/mm, a high I_on/I_off of 4.5 × 10⁷, an average SS of 60 mV/dec, and a DIBL of 30 mV/V. To the best of our knowledge, these are record values among the reported InAlN/GaN HEMTs on Si. RF measurements present that current/power gain cutoff frequency (f_T/f_max) of 215/45 GHz and 130/160 GHz are achieved on the 70-nm InAlN/GaN HEMTs with rectangular and T-shaped gate, respectively.

由于 InAlN 阻挡层很薄，漏电流是 InAlN/GaN 高电子迁移率晶体管 (HEMT) 中的一个严重问题。InGaN背势垒可以提高GaN缓冲层的导带并增强载流子限制，从而降低缓冲漏电流。栅极沉积前的表面氧化处理可以形成氧化层，降低势垒漏电流。在这项研究中，使用这两种技术，在硅衬底上的 InAlN/GaN HEMT 上实现了创纪录的低关断电流 ( I _off ) 和创纪录的高开/关电流 ( I _on / I _off ) 比。具有 70 nm 矩形栅极的 InAlN/GaN HEMT 具有7.15 ×的低I _off  10 ^-8  A/mm、2.20 × 10 ⁷的高I _on / I _off比、69 mV/dec的平均亚阈值摆幅(SS)和90 mV/V的低漏感应势垒降低(DIBL) . 所述的InAlN / GaN HEMT中有70纳米T形栅表现出低我_关闭的3.26×10 ^-8 A /毫米，高我_上/我_关的4.5×10 ⁷，60毫伏/癸平均SS ，以及 30 mV/V 的 DIBL。据我们所知，这些是所报道的 Si 上 InAlN/GaN HEMT 的创纪录值。RF 测量表明电流/功率增益截止频率 ( f   分别在具有矩形和 T 形栅极的 70-nm InAlN/GaN HEMT 上实现了 215/45 GHz 和 130/160 GHz 的_T / f _max )。