In this paper, ferroelectric material based Dual Material Gate-Doping Less Tunnel Field Effect Transistor (DMG-DLTFET) is designed using gate stacked PZT to induce negative capacitance (NC) in the device and analyzed for various device parameters namely trans-conductance (g_m), drain current (I_d), subthreshold slope (SS), threshold voltage (V_TH) and Total capacitance (C_T). Simulated parameters are compared with conventional DMG-DLTFET and it has been found that NC based DMG-DLTFET gives better results. Furthermore, NC reduces the SS resulting in fast switching and hence low power consumption. The effect of thickness of the dielectric material PZT is presented which plays vital role in deciding negative capacitance in device.

在本文中，基于铁电材料的双材料栅极掺杂较少隧道场效应晶体管 (DMG-DLTFET) 设计使用栅极堆叠 PZT 在器件中感应负电容 (NC) 并分析各种器件参数，即跨导(g_米），漏电流（I _ð），亚阈值斜率（SS），阈值电压（V _TH）和总电容（C _Ť）。将仿真参数与传统 DMG-DLTFET 进行比较，发现基于 NC 的 DMG-DLTFET 可提供更好的结果。此外，NC 减少了 SS，从而实现快速切换并因此降低功耗。介绍了介电材料 PZT 厚度的影响，它在决定器件中的负电容方面起着至关重要的作用。