This article presents a frequency interleaved technique (FIT) that can be applied to add resonant peaks in the response of distributed amplifier (DA) for loss compensation and then a frequency-interleaved distributed amplifier (FIDA) that can achieve a high-gain and wide-bandwidth frequency response by summing multiple overlapping distinct-band frequency responses through a distributed configuration. A detailed discussion was introduced to verify the FIDA and a DA was implemented using the FIT. The reported 65-nm CMOS FIDA chip occupies an area of $0.9\times 0.95\,\,\text {mm}^{2}$ and achieves a 17.2 dB small-signal power gain, 2–68 GHz −3-dB bandwidth, gain bandwidth product (GBW) of 478 GHz, and gain ripple of less than 2 dB, while consuming 120 mW under 1.2 V.

中文翻译：

---

具有薄型 3D 打印歧管的异构 2.5-D FPGA 的单片微流体冷却


本文提出了一种频率交错技术（FIT），可用于在分布式放大器（DA）的响应中添加谐振峰值以进行损耗补偿，然后提出一种频率交错分布式放大器（FIDA），可实现高增益和宽范围-通过分布式配置对多个重叠的不同频带频率响应求和的带宽频率响应。引入了详细的讨论来验证 FIDA，并使用 FIT 实施了 DA。所报告的 65 nm CMOS FIDA 芯片占用面积为 $0.9\times 0.95\,\,\text {mm}^{2}$，并实现 17.2 dB 小信号功率增益、2–68 GHz −3-dB 带宽，增益带宽积 (GBW) 为 478 GHz，增益纹波小于 2 dB，同时在 1.2 V 下功耗为 120 mW。