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Combinatorial Register Allocation and Instruction Scheduling
ACM Transactions on Programming Languages and Systems ( IF 1.5 ) Pub Date : 2019-07-02 , DOI: 10.1145/3332373
Roberto Castañeda Lozano 1 , Mats Carlsson 2 , Gabriel Hjort Blindell 3 , Christian Schulte 4
Affiliation  

This article introduces a combinatorial optimization approach to register allocation and instruction scheduling, two central compiler problems. Combinatorial optimization has the potential to solve these problems optimally and to exploit processor-specific features readily. Our approach is the first to leverage this potential in practice : it captures the complete set of program transformations used in state-of-the-art compilers, scales to medium-sized functions of up to 1,000 instructions, and generates executable code. This level of practicality is reached by using constraint programming, a particularly suitable combinatorial optimization technique. Unison, the implementation of our approach, is open source, used in industry, and integrated with the LLVM toolchain. An extensive evaluation confirms that Unison generates better code than LLVM while scaling to medium-sized functions. The evaluation uses systematically selected benchmarks from MediaBench and SPEC CPU2006 and different processor architectures (Hexagon, ARM, MIPS). Mean estimated speedup ranges from 1.1% to 10% and mean code size reduction ranges from 1.3% to 3.8% for the different architectures. A significant part of this improvement is due to the integrated nature of the approach. Executing the generated code on Hexagon confirms that the estimated speedup results in actual speedup. Given a fixed time limit, Unison solves optimally functions of up to 946 instructions, nearly an order of magnitude larger than previous approaches. The results show that our combinatorial approach can be applied in practice to trade compilation time for code quality beyond the usual compiler optimization levels, identify improvement opportunities in heuristic algorithms, and fully exploit processor-specific features.

中文翻译:

组合寄存器分配和指令调度

本文介绍了寄存器分配和指令调度这两个核心编译器问题的组合优化方法。组合优化有可能以最佳方式解决这些问题并轻松利用特定于处理器的功能。我们的方法是第一个利用这种潜力的方法在实践中: 它捕获了完全的最先进的编译器中使用的一组程序转换,到多达 1,000 条指令的中型函数,并生成可执行的代码。通过使用约束规划(一种特别合适的组合优化技术)可以达到这种实用性水平。Unison 是我们方法的实现,是开源的,在工业中使用,并与 LLVM 工具链集成。一项广泛的评估证实,Unison 在扩展到中型函数时生成的代码比 LLVM 更好。该评估使用来自 MediaBench 和 SPEC CPU2006 以及不同处理器架构(Hexagon、ARM、MIPS)的系统选择基准。不同架构的平均估计加速范围为 1.1% 至 10%,平均代码大小减少范围为 1.3% 至 3.8%。这种改进的一个重要部分是由于该方法的集成性。在 Hexagon 上执行生成的代码可以确认估计的加速会导致实际的加速。给定一个固定的时间限制,Unison 解决了多达 946 条指令的最佳功能,比以前的方法大了近一个数量级。结果表明,我们的组合方法可以在实践中应用,以在通常的编译器优化级别之外用编译时间换取代码质量,识别启发式算法的改进机会,并充分利用特定于处理器的特性。
更新日期:2019-07-02
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