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MIMO In-Band-Full-Duplex PLC: Design, Analysis and First Hardware Realization of the Analog Self-Interference Cancellation Stage
IEEE Open Journal of the Communications Society ( IF 6.3 ) Pub Date : 2021-06-03 , DOI: 10.1109/ojcoms.2021.3085830
Davide Righini , Andrea M. Tonello

In-band full-duplex (IBFD) is an attractive solution for increasing the throughput of Power Line Communication (PLC) systems. In IBFD, each network node is allowed to transmit and receive simultaneously in the same frequency band. This paper discusses the importance of defining figures of merit to analyze IBFD performance, which is often forgotten by the literature that addresses IBFD from a pure system level and signal processing perspective. This is because in IBFD hardware-related aspects are of great importance. The focus is then given to the first self-interference (SI) cancellation stage, namely the analog coupling and self-interference cancellation stage (ASICS). Two architectures are considered. A detailed analysis is offered by taking into account circuit-level aspects. A broadband multiple conductor PLC scenario is assumed to enable multiple-input multiple-output (MIMO) IBFD communication. The first considered architecture performs SI subtraction exploiting operational amplifiers. The second proposed architecture exploits the characteristics of a three ports magnetic circuit together with a signal generator to remove the SI. Design, analysis, and hardware realization of these circuits have been done to compare and show the practical feasibility of the ASICS for PLC, well known to be challenged by its line impedance matching problems and severe frequency selective channel characteristics. This paper is the first documented contribution of the IBFD ASICS for $2\times 2$ MIMO broadband PLC physically realized and tested in the field.

中文翻译:


MIMO 带内全双工 PLC:模拟自干扰消除级的设计、分析和首次硬件实现



带内全双工 (IBFD) 是提高电力线通信 (PLC) 系统吞吐量的极具吸引力的解决方案。在IBFD中,允许每个网络节点在同一频带中同时发送和接收。本文讨论了定义品质因数来分析 IBFD 性能的重要性,这一点经常被从纯系统级和信号处理角度讨论 IBFD 的文献所遗忘。这是因为在 IBFD 中,硬件相关方面非常重要。然后重点关注第一个自干扰 (SI) 消除级,即模拟耦合和自干扰消除级 (ASICS)。考虑两种架构。通过考虑电路级方面来提供详细的分析。假设宽带多导体 PLC 场景能够实现多输入多输出 (MIMO) IBFD 通信。第一个考虑的架构利用运算放大器执行 SI 减法。第二种提出的架构利用三端口磁路的特性以及信号发生器来消除 SI。这些电路的设计、分析和硬件实现是为了比较和展示用于 PLC 的 ASICS 的实际可行性,众所周知,PLC 面临着线路阻抗匹配问题和严格的频率选择性通道特性的挑战。本文是 IBFD ASICS 对 $2\times 2$ MIMO 宽带 PLC 物理实现和现场测试的第一篇有记录的贡献。
更新日期:2021-06-03
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