Information flow tracking (IFT) is a widely used methodology for ensuring data confidentiality and/or integrity in electronic systems and many such methods have been developed at various software or hardware description levels. Among them, Proof-Carrying Hardware Intellectual Property (PCHIP) introduced an IFT methodology for digital hardware designs described in hardware description languages (HDLs). However, it is not only the digital domain that suffers from the risk of inadvertent information leakage. Indeed, analog signals originating from sources of sensitive information such as biometric sensors, as well as analog circuit outputs could also carry confidential information. Moreover, analog circuits are equally susceptible as their digital counterparts to malicious modifications, known as hardware Trojans, which could introduce covert channels for leaking such confidential information. Furthermore, in analog/mixed-signal circuits, such information leakage channels may cross the analog/digital or digital/analog interface, making their detection even harder and, thereby, intensifying this security concern. As a solution, we introduce a PCHIP-based methodology which enables systematic formal evaluation of information flow policies in analog/mixed-signal designs. This solution can reason on analog designs described at the transistor-level or at the block-level, where an abstract model of the analog circuit is considered. Additionally, it can handle analog circuit models developed in Verilog-A or Verilog-AMS, thereby enabling the use of circuit models developed in these HDLs for IFT purposes. By integrating IFT across the digital and analog domains, the proposed solution is able to detect sensitive data leakage from the digital domain to the analog domain and vice-versa, without requiring any modification of the current analog/mixed-signal circuit design flow.

中文翻译：

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模拟/混合信号设计中基于硬件的信息流跟踪证明

信息流跟踪 (IFT) 是一种广泛使用的方法，用于确保电子系统中的数据机密性和/或完整性，并且已经在各种软件或硬件描述级别开发了许多此类方法。其中，Proof-Carrying Hardware IP (PCHIP) 介绍了一种用于以硬件描述语言 (HDL) 描述的数字硬件设计的 IFT 方法。然而，遭受信息意外泄露风险的不仅仅是数字领域。实际上，源自敏感信息源（例如生物识别传感器）以及模拟电路输出的模拟信号也可能携带机密信息。此外，模拟电路与其数字电路一样容易受到恶意修改，称为硬件木马，这可能会引入秘密渠道来泄露此类机密信息。此外，在模拟/混合信号电路中，这种信息泄漏通道可能会跨越模拟/数字或数字/模拟接口，使它们的检测更加困难，从而加剧了这种安全问题。作为解决方案，我们引入了一种基于 PCHIP 的方法，该方法能够对模拟/混合信号设计中的信息流策略进行系统的正式评估。该解决方案可以推理在晶体管级或块级描述的模拟设计，其中考虑了模拟电路的抽象模型。此外，它还可以处理在 Verilog-A 或 Verilog-AMS 中开发的模拟电路模型，从而能够将在这些 HDL 中开发的电路模型用于 IFT。通过在数字和模拟域中集成 IFT，