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Clustered Error Resilient SRAM-Based Reconfigurable Computing Platform
IEEE Transactions on Aerospace and Electronic Systems ( IF 5.1 ) Pub Date : 2021-01-25 , DOI: 10.1109/taes.2021.3054070
Swagata Mandal , Amlan Chakrabarti , Srinivasu Bodapati

In the present age of high-density integrated circuits, radiation-induced adjacent multibit upsets (AMBUs) or clustered errors are very prominent in the configuration memory of static-random-access-memory-based field-programmable gate array (FPGA) devices. Radiated particles with high energy and low momentum may damage a group of adjacent logic cells and switches in reconfigurable devices, which can lead to clustered errors. Commonly used error mitigation techniques in the FPGA either have large overheads, complex decoding circuitry, or are not very efficient to correct AMBUs. Hence, efficient multibit error-correcting codes with low redundancy are of utmost need to mitigate the effect of AMBUs. Configuration data of the FPGAs are composed of a number of configuration frames (CFs), and there is a high probability that multiple physically adjacent CFs may be affected by clustered error. Hence, interleaving among CFs is quite advantageous for mitigation of clustered errors in the configuration memory of the FPGA. In this article, we have proposed a simple and efficient error mitigation model combining Hamming product code (HPC) with frame interleaving and selective bit placement , termed as “HPCFISBP” to correct AMBUs in the configuration memory of the FPGA without any modification in its basic architecture. The HPCFISBP provides better bit error rate performance nearly by 20 and 10 dB compared to Hamming code and HPC, respectively. The enhanced performance of the HPCFISBP has also been established through comparison with the state-of-the-art techniques in terms of error correction coverage, error correction time, redundancy, and residual error.

中文翻译:

基于集群错误弹性 SRAM 的可重配置计算平台

在当今高密度集成电路时代,辐射引起的相邻多位翻转 (AMBU) 或集群错误在基于静态随机存取存储器的现场可编程门阵列 (FPGA) 设备的配置存储器中非常突出。具有高能量和低动量的辐射粒子可能会损坏可重构设备中的一组相邻逻辑单元和开关,这可能导致集群错误。FPGA 中常用的错误缓解技术要么开销大、解码电路复杂,要么纠正 AMBU 的效率不高。因此,最需要具有低冗余度的高效多位纠错码来减轻 AMBU 的影响。FPGA 的配置数据由多个配置帧 (CF) 组成,并且多个物理上相邻的 CF 很可能会受到集群错误的影响。因此,CF 之间的交错对于减轻 FPGA 配置存储器中的集群错误非常有利。在本文中,我们提出了一种简单有效的错误缓解模型,结合汉明产品代码 (HPC) 与 帧交错选择性位放置 ,称为“HPCFISBP”,用于纠正 FPGA 配置存储器中的 AMBU,而无需对其基本架构进行任何修改。与汉明码和 HPC 相比,HPCFISBP 分别提供了近 20 和 10 dB 的更好的误码率性能。HPCFISBP 的增强性能也是通过在纠错覆盖率、纠错时间、冗余和残差方面与最先进的技术进行比较而建立的。
更新日期:2021-01-25
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