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A Fast Self-Jamming Cancellation Architecture and Algorithm for Passive RFID Sensor System
IEEE Communications Letters ( IF 3.7 ) Pub Date : 2021-03-17 , DOI: 10.1109/lcomm.2021.3066177
Chuankui Shen 1 , Haoqiu Xiong 2 , Xu Wang 3 , Fengcheng Mei 4 , Terry Tao Ye 2
Affiliation  

In this letter, we propose a fast self-jamming cancellation (SJC) architecture for Ultra High Frequency (UHF) radio-frequency identification (RFID) interrogators. The core SJC architecture includes a Field Programmable Gate Array (FPGA) as the RFID baseband processor, a radio frequency (RF) agile transceiver which has two transmitting ports as the RF front-end, and a combiner. By detecting the amplitude and phase of the interference carrier, the SJC algorithm transmits a suppression carrier through the second transmitting port of the agile RF transceiver. The suppression carrier could effectively suppress the self-jamming carrier without designing complex circuits. Our test results showed the isolation between the transmitting and receiving port achieves 100dB at UHF band, and the cancellation processes can be finished within 0.4ms.

中文翻译:

一种用于无源 RFID 传感器系统的快速自干扰消除架构和算法

在这封信中,我们为超高频 (UHF) 射频识别 (RFID) 询问器提出了一种快速自干扰消除 (SJC) 架构。核心 SJC 架构包括作为 RFID 基带处理器的现场可编程门阵列 (FPGA)、具有两个发射端口作为射频前端的射频 (RF) 捷变收发器和一个合路器。SJC算法通过检测干扰载波的幅度和相位,通过捷变射频收发器的第二发射端口发射抑制载波。抑制载波可以有效抑制自干扰载波,无需设计复杂的电路。我们的测试结果表明,在 UHF 频段,发射端口和接收端口之间的隔离度达到了 100dB,消除过程可以在 0.4ms 内完成。
更新日期:2021-03-17
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