STT-MRAM mass production is around the corner as major foundries worldwide invest heavily on its commercialization. To ensure high-quality STT-MRAM products, effective yet cost-efficient test solutions are of great importance. This paper presents a systematic device-aware defect and fault modeling framework for STT-MRAM to derive accurate fault models which reflect the physical defects appropriately, and thereafter optimal and high-quality test solutions. An overview and classification of manufacturing defects in STT-MRAMs are provided with an emphasis on those related to the fabrication of magnetic tunnel junction (MTJ) devices, i.e., the data-storing elements. Defects in MTJ devices need to be modeled by adjusting the affected technology parameters and subsequent electrical parameters to fully capture the defect impact on both the devicea#x0027;s electrical and magnetic properties, whereas defects in interconnects can be modeled as linear resistors. In addition, a complete single-cell fault space and nomenclature are defined, and a systematic fault analysis methodology is proposed. To demonstrate the use of the proposed framework, resistive defects in interconnect and pinhole defects in MTJ devices are analyzed for a single 1T-1MTJ memory cell. Test solutions for detecting these defects are also discussed.

中文翻译：

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用于 STT-MRAM 测试的缺陷和故障建模框架

随着全球主要代工厂对其商业化投入巨资，STT-MRAM 量产即将到来。为了确保高质量的 STT-MRAM 产品，有效且具有成本效益的测试解决方案非常重要。本文提出了一种用于 STT-MRAM 的系统的设备感知缺陷和故障建模框架，以推导出能够适当反映物理缺陷的准确故障模型，然后是最佳和高质量的测试解决方案。提供了 STT-MRAM 制造缺陷的概述和分类，重点是与磁性隧道结 (MTJ) 器件制造相关的缺陷，即数据存储元件。MTJ 器件中的缺陷需要通过调整受影响的技术参数和后续电气参数来建模，以充分捕捉缺陷对器件的影响a#x0027；s 电和磁特性，而互连中的缺陷可以建模为线性电阻器。此外，定义了完整的单电池故障空间和术语，并提出了系统的故障分析方法。为了演示所提出框架的使用，我们分析了单个 1T-1MTJ 存储单元的互连电阻缺陷和 MTJ 器件中的针孔缺陷。还讨论了用于检测这些缺陷的测试解决方案。针对单个 1T-1MTJ 存储单元分析互连中的电阻缺陷和 MTJ 器件中的针孔缺陷。还讨论了用于检测这些缺陷的测试解决方案。针对单个 1T-1MTJ 存储单元分析互连中的电阻缺陷和 MTJ 器件中的针孔缺陷。还讨论了用于检测这些缺陷的测试解决方案。