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Compact 3D Thermal Model for VLSI and ULSI Interconnect Network Reliability Verification
IEEE Transactions on Device and Materials Reliability ( IF 2.5 ) Pub Date : 2021-03-17 , DOI: 10.1109/tdmr.2021.3066385
Assaad El Helou , Archana Venugopal , Peter E. Raad

A compact 3D thermal model is developed for the quick and accurate thermal characterization of self-heating in Back-End-of-Line (BEoL) interconnect network for reliability assessment. The model offers a more accurate thermal tool compared to the currently used conservative 2D reduced models. Both 2D and 3D reduced models are developed and verified against numerical simulations of different configurations and further validated against thermoreflectance measurements of specially fabricated samples devices. The compact model ultimately provides quick thermal characterizations for vast ICT networks at a fraction of the analysis time and computational cost required for full numeric simulations, with improved accuracy that could reach 20 fold that of currently applied conservative reduced models. When integrated with electrical layout designs, the model would serve as a thermal check on VLSI and ULSI networks to identify thermally critical regions where overheating could lead to degradation and reliability issues.

中文翻译:

用于 VLSI 和 ULSI 互连网络可靠性验证的紧凑型 3D 热模型

开发了一个紧凑的 3D 热模型,用于快速准确地对后端 (BEoL) 互连网络中的自热进行热表征,以进行可靠性评估。与当前使用的保守 2D 缩减模型相比,该模型提供了更准确的热工具。2D 和 3D 简化模型都是针对不同配置的数值模拟进行开发和验证的,并针对专门制造的样品设备的热反射测量进行了进一步验证。紧凑模型最终以全数值模拟所需的分析时间和计算成本的一小部分为庞大的 ICT 网络提供快速热表征,其精度提高,可以达到当前应用的保守简化模型的 20 倍。当与电气布局设计集成时,
更新日期:2021-03-17
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