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Design and Analysis of Approximate Compressors for Balanced Error Accumulation in MAC Operator
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.2 ) Pub Date : 2021-04-26 , DOI: 10.1109/tcsi.2021.3073177
Gunho Park , Jaeha Kung , Youngjoo Lee

In this paper, we present a novel approximate computing scheme suitable for realizing the energy-efficient multiply-accumulate (MAC) processing. In contrast to the prior works that suffer from the error accumulation limiting the approximate range, we utilize different approximate multipliers in an interleaved way to compensate errors in the opposite direction during accumulate operations. For the balanced error accumulation, we first design the approximate 4–2 compressors generating errors in the opposite direction while minimizing the computational costs. Based on the probabilistic analysis, positive and negative multipliers are then carefully developed to provide a similar error distance. Simulation results on various practical applications reveal that the proposed MAC processing offers the energy-efficient computing scenario by extending the range of approximate parts. Even compared to the state-of-the-art solutions, for example, the proposed interleaving scheme relaxes the core-level energy consumption of the recent CNN accelerator by more than 35% without degrading the recognition accuracy.

中文翻译:


MAC算子中平衡误差累加近似压缩器的设计与分析



在本文中,我们提出了一种适合实现节能乘法累加(MAC)处理的新型近似计算方案。与之前的工作受到误差累积限制近似范围的影响相比,我们以交错的方式利用不同的近似乘法器来补偿累加操作期间相反方向的误差。为了平衡误差累积,我们首先设计大约 4-2 个压缩器,在相反方向产生误差,同时最小化计算成本。基于概率分析,然后仔细开发正乘数和负乘数以提供类似的误差距离。各种实际应用的仿真结果表明,所提出的 MAC 处理通过扩展近似部分的范围提供了节能计算场景。例如,即使与最先进的解决方案相比,所提出的交错方案也可以将最新 CNN 加速器的核心级能耗降低 35% 以上,而不会降低识别精度。
更新日期:2021-04-26
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