Manufacturing defects can cause hard-to-detect (HTD) faults in fin field-effect transistor (FinFET) static random access memories (SRAMs). Detection of these faults, such as random read outputs and out-of-spec parametric deviations, is essential when testing FinFET SRAMs. Undetected HTD faults result in test escapes, which lead to early in-field failures. This article presents a detailed analysis of HTD faults in FinFET SRAMs by exploring their sensitization and discussing solutions to improve HTD fault coverage during manufacturing testing. We first define the fault space for SRAMs and classify all faults in the space. Following this, we perform a systematic fault analysis based on injecting resistive defects in a memory cell, inspecting its behavior, and identifying HTD faults. Furthermore, we survey existing test solutions and discuss their HTD fault coverage and limitations. Based on our analysis, it is clear that no single test solution can fully detect all HTD faults, thus leading to test escapes. Hence, there is a need for new and more efficient test solutions. Improved detection of HTD faults could be achieved by using parametric test solutions, proposing solutions that cover yet-untargeted HTD faults, combining multiple test approaches into a single solution, and further exploring stress conditions. These new approaches would reduce test escapes and therefore improve the quality of FinFET SRAMs.

中文翻译：

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FinFET SRAM 中难以检测的故障分析


制造缺陷可能会导致鳍式场效应晶体管 (FinFET) 静态随机存取存储器 (SRAM) 中出现难以检测的 (HTD) 故障。在测试 FinFET SRAM 时，检测这些故障（例如随机读取输出和不合规格的参数偏差）至关重要。未检测到的 HTD 故障会导致测试逃逸，从而导致早期现场故障。本文通过探讨 FinFET SRAM 中的 HTD 故障的敏感性并讨论在制造测试期间提高 HTD 故障覆盖率的解决方案，对 FinFET SRAM 中的 HTD 故障进行了详细分析。我们首先定义 SRAM 的故障空间并对空间中的所有故障进行分类。接下来，我们基于在存储单元中注入电阻缺陷、检查其行为并识别 HTD 故障来执行系统故障分析。此外，我们还调查了现有的测试解决方案并讨论了它们的 HTD 故障覆盖范围和局限性。根据我们的分析，很明显没有任何一种测试解决方案能够完全检测出所有 HTD 故障，从而导致测试逃逸。因此，需要新的、更有效的测试解决方案。通过使用参数测试解决方案、提出涵盖尚未确定的 HTD 故障的解决方案、将多种测试方法组合到单个解决方案中以及进一步探索应力条件，可以改进对 HTD 故障的检测。这些新方法将减少测试逃逸，从而提高 FinFET SRAM 的质量。