In this article, a ridged substrate integrated coaxial line (RSICL) is proposed, which has a compact size, wide bandwidth, and excellent shielding. The RSICL has two ridges set on both sides of its outer conductor, which introduce additional capacitance and enhance shielding performance. Compared with the SICL, the width of the RSICL can be reduced significantly for 50- $\Omega $ characteristic impedance. Hence, the monomode bandwidth of the RSICL is larger than that of the SICL. Closed-form formulas based on the conformal mapping method are derived for fast calculation of the characteristic impedance of the RSICL. Compared with full-wave simulation, the proposed formula has an error of less than 1%. An RSICL with grounded coplanar waveguide (GCPW) transitions is designed and fabricated under print circuit board (PCB) technology. The measurement results show the RSICL with the transitions has a bandwidth from dc to 40 GHz, insertion loss less than 1.9 dB, return loss larger than 10.5 dB, and a data rate of 32 Gb/s with a good eye diagram and low bit error rate (BER). The measured attenuation of the RSICL is 0.021 dB/mm at 40 GHz. Full-wave simulation results show that the width of the RSICL is 6% smaller than that of the SICL, the monomode bandwidth is 6.7% wider, and the energy leakage of the RSICL is only 1/120 of the SICL.

中文翻译：

---

用于宽带毫米波传输的脊状基板集成同轴线


本文提出了一种脊状基板集成同轴线（RSICL），它具有尺寸紧凑、带宽宽和屏蔽性能优良的特点。 RSICL 的外导体两侧设有两个脊，可引入额外的电容并增强屏蔽性能。与SICL相比，对于50-$\Omega$的特性阻抗，RSICL的宽度可以显着减小。因此，RSICL 的单模带宽大于 SICL。推导了基于保角映射方法的闭式公式，用于快速计算RSICL的特性阻抗。与全波模拟相比，所提出的公式误差小于1%。具有接地共面波导 (GCPW) 转换的 RSICL 是根据印刷电路板 (PCB) 技术设计和制造的。测量结果表明，带有过渡的RSICL具有从直流到40 GHz的带宽，插入损耗小于1.9 dB，回波损耗大于10.5 dB，数据速率为32 Gb/s，具有良好的眼图和低误码率率（误码率）。在 40 GHz 时测得的 RSICL 衰减为 0.021 dB/mm。全波仿真结果表明，RSICL的宽度比SICL小6%，单模带宽宽6.7%，且RSICL的能量泄漏仅为SICL的1/120。