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A fast Binary Decision Diagram (BDD)-based reversible logic optimization engine driven by recent meta-heuristic reordering algorithms
Microelectronics Reliability ( IF 1.6 ) Pub Date : 2021-06-01 , DOI: 10.1016/j.microrel.2021.114168
Baker Abdalhaq , Ahmed Awad , Amjad Hawash

Reversible logic has recently gained a remarkable interest due to its information lossless property, which minimizes power dissipation in the circuit. Furthermore, with their natural reversibility, quantum computations can profit from the advances in reversible logic synthesis, as the latter can be easily applied to map practical logic designs to quantum architectures. Although numerous algorithms have been proposed to synthesize reversible circuits with low cost, the increasing demands for scalable synthesis techniques represent a serious barrier in the synthesis process. Furthermore, the enhanced reliability of the synthesized circuits comes at the cost of redundancy in the quantum architecture of the gates composing that circuit, which increases the overall manufacturing cost for fault-tolerant circuits. Binary Decision Diagram (BDD) based synthesis has demonstrated a great evidence in reversible logic synthesis, due to its scalability in synthesizing complex circuits within a reasonable time. However, the cost of the synthesized circuit is roughly correlated to its corresponding BDD size. In this paper, we propose a fast reversible circuit synthesis methodology driven by a BDD-reordering optimization engine implemented by recent meta-heuristic optimization algorithms. Experimental results show that Genetic Algorithm (GA) based reordering supported with Alternating Crossover (AX) and swap mutation outperforms others as it is the least destructive for low-cost BDDs during the optimization recipe.



中文翻译:

由最近的元启发式重新排序算法驱动的基于快速二元决策图 (BDD) 的可逆逻辑优化引擎

可逆逻辑最近因其信息无损特性而引起了人们极大的兴趣,该特性可最大限度地减少电路中的功耗。此外,凭借其自然的可逆性,量子计算可以从可逆逻辑合成的进步中受益,因为后者可以很容易地应用于将实际逻辑设计映射到量子架构。尽管已经提出了许多算法来以低成本合成可逆电路,但对可扩展合成技术的日益增长的需求代表了合成过程中的严重障碍。此外,合成电路的可靠性增强是以组成该电路的门的量子架构冗余为代价的,这增加了容错电路的总体制造成本。基于二元决策图 (BDD) 的综合已经在可逆逻辑综合中证明了一个很好的证据,因为它在合理的时间内综合复杂电路的可扩展性。然而,合成电路的成本与其对应的 BDD 大小大致相关。在本文中,我们提出了一种由 BDD 重新排序优化引擎驱动的快速可逆电路合成方法,该引擎由最近的元启发式优化算法实现。实验结果表明,交替交叉 (AX) 和交换突变支持的基于遗传算法 (GA) 的重新排序优于其他算法,因为它在优化配方期间对低成本 BDD 的破坏性最小。然而,合成电路的成本与其对应的 BDD 大小大致相关。在本文中,我们提出了一种由 BDD 重新排序优化引擎驱动的快速可逆电路合成方法,该引擎由最近的元启发式优化算法实现。实验结果表明,交替交叉 (AX) 和交换突变支持的基于遗传算法 (GA) 的重新排序优于其他算法,因为它在优化配方期间对低成本 BDD 的破坏性最小。然而,合成电路的成本与其对应的 BDD 大小大致相关。在本文中,我们提出了一种由 BDD 重新排序优化引擎驱动的快速可逆电路合成方法,该引擎由最近的元启发式优化算法实现。实验结果表明,交替交叉 (AX) 和交换突变支持的基于遗传算法 (GA) 的重新排序优于其他算法,因为它在优化配方期间对低成本 BDD 的破坏性最小。

更新日期:2021-06-01
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