In this work, we review progress in III-V transistor technologies. Key approaches for silicon integration are described, with a distinction being made between large area layer transfer and selective growth techniques. We show how the integration approach must be tailored for the intended application to maximize performance, functionality and minimize cost. We also highlight performance boosters such as heterostructure channel stacks, which offer increased carrier mobility towards improved RF and RF-CMOS performance. Recent progress in tunneling field-effect transistors (TFETs) have enabled the TFET architecture as a process module, allowing for dense integration with MOSFETs on the same chip towards an extremely low-power CMOS technology. Finally, we highlight emerging applications for III-V devices at cryogenic temperatures, where there is a rising need for low-power electronics to support the scaling of quantum computers. The unique properties of III-V, their high mobility and band gap engineering make them highly suitable for this application.

在这项工作中，我们回顾了 III-V 晶体管技术的进展。描述了硅集成的关键方法，区分了大面积层转移和选择性生长技术。我们展示了必须如何为预期应用量身定制集成方法，以最大限度地提高性能、功能和成本。我们还重点介绍了性能助推器，例如异质结构通道堆栈，它提供更高的载流子迁移率，从而改善 RF 和 RF-CMOS 性能。隧道场效应晶体管 (TFET) 的最新进展使 TFET 架构成为一种工艺模块，允许在同一芯片上与 MOSFET 紧密集成，从而实现极低功耗的 CMOS 技术。最后，我们重点介绍了 III-V 族器件在低温下的新兴应用，对低功耗电子设备的需求不断增加，以支持量子计算机的扩展。III-V 族的独特特性、高迁移率和带隙工程使其非常适合这种应用。